ev5_alpha_defs.h revision 8013:2dfcde2e9998
1/* 2 * Copyright 1993 Hewlett-Packard Development Company, L.P. 3 * 4 * Permission is hereby granted, free of charge, to any person 5 * obtaining a copy of this software and associated documentation 6 * files (the "Software"), to deal in the Software without 7 * restriction, including without limitation the rights to use, copy, 8 * modify, merge, publish, distribute, sublicense, and/or sell copies 9 * of the Software, and to permit persons to whom the Software is 10 * furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be 13 * included in all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 25#ifndef EV5_ALPHA_DEFS_INCLUDED 26#define EV5_ALPHA_DEFS_INCLUDED 1 27 28// from ev5_alpha_defs.mar from Lance's fetch directory 29// Lower-caseified and $ signs removed ... pb Nov/95 30 31// 32// PS Layout - PS 33// Loc Size name function 34// ------ ------ ______ ----------------------------------- 35// <31:29> 3 SA stack alignment 36// <31:13> 24 RES Reserved MBZ 37// <12:8> 5 IPL Priority level 38// <7> 1 VMM Virtual Mach Monitor 39// <6:5> 2 RES Reserved MBZ 40// <4:3> 2 CM Current Mode 41// <2> 1 IP Interrupt Pending 42// <1:0> 2 SW Software bits 43// 44 45#define ps_v_sw 0 46#define ps_m_sw (3<<ps_v_sw) 47 48#define ps_v_ip 2 49#define ps_m_ip (1<<ps_v_ip) 50 51#define ps_v_cm 3 52#define ps_m_cm (3<<ps_v_cm) 53 54#define ps_v_vmm 7 55#define ps_m_vmm (1<<ps_v_vmm) 56 57#define ps_v_ipl 8 58#define ps_m_ipl (0x1f<<ps_v_ipl) 59 60#define ps_v_sp (0x38) 61#define ps_m_sp (0x3f<<ps_v_sp) 62 63 64#define ps_c_kern (0x00) 65#define ps_c_exec (0x08) 66#define ps_c_supr (0x10) 67#define ps_c_user (0x18) 68#define ps_c_ipl0 (0x0000) 69#define ps_c_ipl1 (0x0100) 70#define ps_c_ipl2 (0x0200) 71#define ps_c_ipl3 (0x0300) 72#define ps_c_ipl4 (0x0400) 73#define ps_c_ipl5 (0x0500) 74#define ps_c_ipl6 (0x0600) 75#define ps_c_ipl7 (0x0700) 76#define ps_c_ipl8 (0x0800) 77#define ps_c_ipl9 (0x0900) 78#define ps_c_ipl10 (0x0A00) 79#define ps_c_ipl11 (0x0B00) 80#define ps_c_ipl12 (0x0C00) 81#define ps_c_ipl13 (0x0D00) 82#define ps_c_ipl14 (0x0E00) 83#define ps_c_ipl15 (0x0F00) 84#define ps_c_ipl16 (0x1000) 85#define ps_c_ipl17 (0x1100) 86#define ps_c_ipl18 (0x1200) 87#define ps_c_ipl19 (0x1300) 88#define ps_c_ipl20 (0x1400) 89#define ps_c_ipl21 (0x1500) 90#define ps_c_ipl22 (0x1600) 91#define ps_c_ipl23 (0x1700) 92#define ps_c_ipl24 (0x1800) 93#define ps_c_ipl25 (0x1900) 94#define ps_c_ipl26 (0x1A00) 95#define ps_c_ipl27 (0x1B00) 96#define ps_c_ipl28 (0x1C00) 97#define ps_c_ipl29 (0x1D00) 98#define ps_c_ipl30 (0x1E00) 99#define ps_c_ipl31 (0x1F00) 100 101// 102// PTE layout - symbol prefix PTE_ 103// 104// Loc Size name function 105// ------ ------ ------ ----------------------------------- 106// <63:32> 32 PFN Page Frame Number 107// <31:16> 16 SOFT Bits reserved for software use 108// <15> 1 UWE User write enable 109// <14> 1 SWE Super write enable 110// <13> 1 EWE Exec write enable 111// <12> 1 KWE Kernel write enable 112// <11> 1 URE User read enable 113// <10> 1 SRE Super read enable 114// <9> 1 ERE Exec read enable 115// <8> 1 KRE Kernel read enable 116// <7:6> 2 RES Reserved SBZ 117// <5> 1 HPF Huge Page Flag 118// <4> 1 ASM Wild card address space number match 119// <3> 1 FOE Fault On execute 120// <2> 1 FOW Fault On Write 121// <1> 1 FOR Fault On Read 122// <0> 1 V valid bit 123// 124 125#define pte_v_pfn 32 126#define pte_m_soft (0xFFFF0000) 127#define pte_v_soft 16 128#define pte_m_uwe (0x8000) 129#define pte_v_uwe 15 130#define pte_m_swe (0x4000) 131#define pte_v_swe 14 132#define pte_m_ewe (0x2000) 133#define pte_v_ewe 13 134#define pte_m_kwe (0x1000) 135#define pte_v_kwe 12 136#define pte_m_ure (0x0800) 137#define pte_v_ure 11 138#define pte_m_sre (0x0400) 139#define pte_v_sre 10 140#define pte_m_ere (0x0200) 141#define pte_v_ere 9 142#define pte_m_kre (0x0100) 143#define pte_v_kre 8 144#define pte_m_hpf (0x0020) 145#define pte_v_hpf 5 146#define pte_m_asm (0x0010) 147#define pte_v_asm 4 148#define pte_m_foe (0x0008) 149#define pte_v_foe 3 150#define pte_m_fow (0x0004) 151#define pte_v_fow 2 152#define pte_m_for (0x0002) 153#define pte_v_for 1 154#define pte_m_v (0x0001) 155#define pte_v_v 0 156 157// 158// VA layout - symbol prefix VA_ 159// 160// Loc Size name function 161// ------ ------ ------- ----------------------------------- 162// <42:33> 10 SEG1 First seg table offset for mapping 163// <32:23> 10 SEG2 Second seg table offset for mapping 164// <22:13> 10 SEG3 Third seg table offset for mapping 165// <12:0> 13 OFFSET Byte within page 166// 167 168#define va_m_offset (0x000000001FFF) 169#define va_v_offset 0 170#define va_m_seg3 (0x0000007FE000) 171#define va_v_seg3 13 172#define va_m_seg2 (0x0001FF800000) 173#define va_v_seg2 23 174#define va_m_seg1 (0x7FE00000000) 175#define va_v_seg1 33 176 177// 178//PRIVILEGED CONTEXT BLOCK (PCB) 179// 180#define pcb_q_ksp 0 181#define pcb_q_esp 8 182#define pcb_q_ssp 16 183#define pcb_q_usp 24 184#define pcb_q_ptbr 32 185#define pcb_q_asn 40 186#define pcb_q_ast 48 187#define pcb_q_fen 56 188#define pcb_q_cc 64 189#define pcb_q_unq 72 190#define pcb_q_sct 80 191 192#define pcb_v_asten 0 193#define pcb_m_asten (0x0f<<pcb_v_asten) 194#define pcb_v_astsr 4 195#define pcb_m_astsr (0x0f<<pcb_v_astsr) 196#define pcb_v_dat 63 197#define pcb_v_pme 62 198 199// 200// SYSTEM CONTROL BLOCK (SCB) 201// 202 203#define scb_v_fen (0x0010) 204#define scb_v_acv (0x0080) 205#define scb_v_tnv (0x0090) 206#define scb_v_for (0x00A0) 207#define scb_v_fow (0x00B0) 208#define scb_v_foe (0x00C0) 209#define scb_v_arith (0x0200) 210#define scb_v_kast (0x0240) 211#define scb_v_east (0x0250) 212#define scb_v_sast (0x0260) 213#define scb_v_uast (0x0270) 214#define scb_v_unalign (0x0280) 215#define scb_v_bpt (0x0400) 216#define scb_v_bugchk (0x0410) 217#define scb_v_opcdec (0x0420) 218#define scb_v_illpal (0x0430) 219#define scb_v_trap (0x0440) 220#define scb_v_chmk (0x0480) 221#define scb_v_chme (0x0490) 222#define scb_v_chms (0x04A0) 223#define scb_v_chmu (0x04B0) 224#define scb_v_sw0 (0x0500) 225#define scb_v_sw1 (0x0510) 226#define scb_v_sw2 (0x0520) 227#define scb_v_sw3 (0x0530) 228#define scb_v_sw4 (0x0540) 229#define scb_v_sw5 (0x0550) 230#define scb_v_sw6 (0x0560) 231#define scb_v_sw7 (0x0570) 232#define scb_v_sw8 (0x0580) 233#define scb_v_sw9 (0x0590) 234#define scb_v_sw10 (0x05A0) 235#define scb_v_sw11 (0x05B0) 236#define scb_v_sw12 (0x05C0) 237#define scb_v_sw13 (0x05D0) 238#define scb_v_sw14 (0x05E0) 239#define scb_v_sw15 (0x05F0) 240#define scb_v_clock (0x0600) 241#define scb_v_inter (0x0610) 242#define scb_v_sys_corr_err (0x0620) 243#define scb_v_proc_corr_err (0x0630) 244#define scb_v_pwrfail (0x0640) 245#define scb_v_perfmon (0x0650) 246#define scb_v_sysmchk (0x0660) 247#define scb_v_procmchk (0x0670) 248#define scb_v_passive_rel (0x06F0) 249 250// 251// Stack frame (FRM) 252// 253 254#define frm_v_r2 (0x0000) 255#define frm_v_r3 (0x0008) 256#define frm_v_r4 (0x0010) 257#define frm_v_r5 (0x0018) 258#define frm_v_r6 (0x0020) 259#define frm_v_r7 (0x0028) 260#define frm_v_pc (0x0030) 261#define frm_v_ps (0x0038) 262 263// 264// Exeception summary register (EXS) 265// 266// exs_v_swc <0> ; Software completion 267// exs_v_inv <1> ; Ivalid operation 268// exs_v_dze <2> ; Div by zero 269// exs_v_fov <3> ; Floating point overflow 270// exs_v_unf <4> ; Floating point underflow 271// exs_v_ine <5> ; Floating point inexact 272// exs_v_iov <6> ; Floating convert to integer overflow 273#define exs_v_swc 0 274#define exs_v_inv 1 275#define exs_v_dze 2 276#define exs_v_fov 3 277#define exs_v_unf 4 278#define exs_v_ine 5 279#define exs_v_iov 6 280 281#define exs_m_swc (1<<exs_v_swc) 282#define exs_m_inv (1<<exs_v_inv) 283#define exs_m_dze (1<<exs_v_dze) 284#define exs_m_fov (1<<exs_v_fov) 285#define exs_m_unf (1<<exs_v_unf) 286#define exs_m_ine (1<<exs_v_ine) 287#define exs_m_iov (1<<exs_v_iov) 288 289// 290// machine check error summary register (mces) 291// 292// mces_v_mchk <0> ; machine check in progress 293// mces_v_sce <1> ; system correctable error 294// mces_v_pce <2> ; processor correctable error 295// mces_v_dpc <3> ; disable reporting of processor correctable errors 296// mces_v_dsc <4> ; disable reporting of system correctable errors 297#define mces_v_mchk 0 298#define mces_v_sce 1 299#define mces_v_pce 2 300#define mces_v_dpc 3 301#define mces_v_dsc 4 302 303#define mces_m_mchk (1<<mces_v_mchk) 304#define mces_m_sce (1<<mces_v_sce) 305#define mces_m_pce (1<<mces_v_pce) 306#define mces_m_dpc (1<<mces_v_dpc) 307#define mces_m_dsc (1<<mces_v_dsc) 308#define mces_m_all ((1<<mces_v_mchk) | (1<<mces_v_sce) | (1<<mces_v_pce) | (1<<mces_v_dpc) | (1<<mces_v_dsc)) 309 310#endif 311