1/* 2 * Copyright (c) 1993 The Hewlett-Packard Development Company 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#ifndef EV5_ALPHA_DEFS_INCLUDED 30#define EV5_ALPHA_DEFS_INCLUDED 1 31 32// from ev5_alpha_defs.mar from Lance's fetch directory 33// Lower-caseified and $ signs removed ... pb Nov/95 34 35// 36// PS Layout - PS 37// Loc Size name function 38// ------ ------ ______ ----------------------------------- 39// <31:29> 3 SA stack alignment 40// <31:13> 24 RES Reserved MBZ 41// <12:8> 5 IPL Priority level 42// <7> 1 VMM Virtual Mach Monitor 43// <6:5> 2 RES Reserved MBZ 44// <4:3> 2 CM Current Mode 45// <2> 1 IP Interrupt Pending 46// <1:0> 2 SW Software bits 47// 48 49#define ps_v_sw 0 50#define ps_m_sw (3<<ps_v_sw) 51 52#define ps_v_ip 2 53#define ps_m_ip (1<<ps_v_ip) 54 55#define ps_v_cm 3 56#define ps_m_cm (3<<ps_v_cm) 57 58#define ps_v_vmm 7 59#define ps_m_vmm (1<<ps_v_vmm) 60 61#define ps_v_ipl 8 62#define ps_m_ipl (0x1f<<ps_v_ipl) 63 64#define ps_v_sp (0x38) 65#define ps_m_sp (0x3f<<ps_v_sp) 66 67 68#define ps_c_kern (0x00) 69#define ps_c_exec (0x08) 70#define ps_c_supr (0x10) 71#define ps_c_user (0x18) 72#define ps_c_ipl0 (0x0000) 73#define ps_c_ipl1 (0x0100) 74#define ps_c_ipl2 (0x0200) 75#define ps_c_ipl3 (0x0300) 76#define ps_c_ipl4 (0x0400) 77#define ps_c_ipl5 (0x0500) 78#define ps_c_ipl6 (0x0600) 79#define ps_c_ipl7 (0x0700) 80#define ps_c_ipl8 (0x0800) 81#define ps_c_ipl9 (0x0900) 82#define ps_c_ipl10 (0x0A00) 83#define ps_c_ipl11 (0x0B00) 84#define ps_c_ipl12 (0x0C00) 85#define ps_c_ipl13 (0x0D00) 86#define ps_c_ipl14 (0x0E00) 87#define ps_c_ipl15 (0x0F00) 88#define ps_c_ipl16 (0x1000) 89#define ps_c_ipl17 (0x1100) 90#define ps_c_ipl18 (0x1200) 91#define ps_c_ipl19 (0x1300) 92#define ps_c_ipl20 (0x1400) 93#define ps_c_ipl21 (0x1500) 94#define ps_c_ipl22 (0x1600) 95#define ps_c_ipl23 (0x1700) 96#define ps_c_ipl24 (0x1800) 97#define ps_c_ipl25 (0x1900) 98#define ps_c_ipl26 (0x1A00) 99#define ps_c_ipl27 (0x1B00) 100#define ps_c_ipl28 (0x1C00) 101#define ps_c_ipl29 (0x1D00) 102#define ps_c_ipl30 (0x1E00) 103#define ps_c_ipl31 (0x1F00) 104 105// 106// PTE layout - symbol prefix PTE_ 107// 108// Loc Size name function 109// ------ ------ ------ ----------------------------------- 110// <63:32> 32 PFN Page Frame Number 111// <31:16> 16 SOFT Bits reserved for software use 112// <15> 1 UWE User write enable 113// <14> 1 SWE Super write enable 114// <13> 1 EWE Exec write enable 115// <12> 1 KWE Kernel write enable 116// <11> 1 URE User read enable 117// <10> 1 SRE Super read enable 118// <9> 1 ERE Exec read enable 119// <8> 1 KRE Kernel read enable 120// <7:6> 2 RES Reserved SBZ 121// <5> 1 HPF Huge Page Flag 122// <4> 1 ASM Wild card address space number match 123// <3> 1 FOE Fault On execute 124// <2> 1 FOW Fault On Write 125// <1> 1 FOR Fault On Read 126// <0> 1 V valid bit 127// 128 129#define pte_v_pfn 32 130#define pte_m_soft (0xFFFF0000) 131#define pte_v_soft 16 132#define pte_m_uwe (0x8000) 133#define pte_v_uwe 15 134#define pte_m_swe (0x4000) 135#define pte_v_swe 14 136#define pte_m_ewe (0x2000) 137#define pte_v_ewe 13 138#define pte_m_kwe (0x1000) 139#define pte_v_kwe 12 140#define pte_m_ure (0x0800) 141#define pte_v_ure 11 142#define pte_m_sre (0x0400) 143#define pte_v_sre 10 144#define pte_m_ere (0x0200) 145#define pte_v_ere 9 146#define pte_m_kre (0x0100) 147#define pte_v_kre 8 148#define pte_m_hpf (0x0020) 149#define pte_v_hpf 5 150#define pte_m_asm (0x0010) 151#define pte_v_asm 4 152#define pte_m_foe (0x0008) 153#define pte_v_foe 3 154#define pte_m_fow (0x0004) 155#define pte_v_fow 2 156#define pte_m_for (0x0002) 157#define pte_v_for 1 158#define pte_m_v (0x0001) 159#define pte_v_v 0 160 161// 162// VA layout - symbol prefix VA_ 163// 164// Loc Size name function 165// ------ ------ ------- ----------------------------------- 166// <42:33> 10 SEG1 First seg table offset for mapping 167// <32:23> 10 SEG2 Second seg table offset for mapping 168// <22:13> 10 SEG3 Third seg table offset for mapping 169// <12:0> 13 OFFSET Byte within page 170// 171 172#define va_m_offset (0x000000001FFF) 173#define va_v_offset 0 174#define va_m_seg3 (0x0000007FE000) 175#define va_v_seg3 13 176#define va_m_seg2 (0x0001FF800000) 177#define va_v_seg2 23 178#define va_m_seg1 (0x7FE00000000) 179#define va_v_seg1 33 180 181// 182//PRIVILEGED CONTEXT BLOCK (PCB) 183// 184#define pcb_q_ksp 0 185#define pcb_q_esp 8 186#define pcb_q_ssp 16 187#define pcb_q_usp 24 188#define pcb_q_ptbr 32 189#define pcb_q_asn 40 190#define pcb_q_ast 48 191#define pcb_q_fen 56 192#define pcb_q_cc 64 193#define pcb_q_unq 72 194#define pcb_q_sct 80 195 196#define pcb_v_asten 0 197#define pcb_m_asten (0x0f<<pcb_v_asten) 198#define pcb_v_astsr 4 199#define pcb_m_astsr (0x0f<<pcb_v_astsr) 200#define pcb_v_dat 63 201#define pcb_v_pme 62 202 203// 204// SYSTEM CONTROL BLOCK (SCB) 205// 206 207#define scb_v_fen (0x0010) 208#define scb_v_acv (0x0080) 209#define scb_v_tnv (0x0090) 210#define scb_v_for (0x00A0) 211#define scb_v_fow (0x00B0) 212#define scb_v_foe (0x00C0) 213#define scb_v_arith (0x0200) 214#define scb_v_kast (0x0240) 215#define scb_v_east (0x0250) 216#define scb_v_sast (0x0260) 217#define scb_v_uast (0x0270) 218#define scb_v_unalign (0x0280) 219#define scb_v_bpt (0x0400) 220#define scb_v_bugchk (0x0410) 221#define scb_v_opcdec (0x0420) 222#define scb_v_illpal (0x0430) 223#define scb_v_trap (0x0440) 224#define scb_v_chmk (0x0480) 225#define scb_v_chme (0x0490) 226#define scb_v_chms (0x04A0) 227#define scb_v_chmu (0x04B0) 228#define scb_v_sw0 (0x0500) 229#define scb_v_sw1 (0x0510) 230#define scb_v_sw2 (0x0520) 231#define scb_v_sw3 (0x0530) 232#define scb_v_sw4 (0x0540) 233#define scb_v_sw5 (0x0550) 234#define scb_v_sw6 (0x0560) 235#define scb_v_sw7 (0x0570) 236#define scb_v_sw8 (0x0580) 237#define scb_v_sw9 (0x0590) 238#define scb_v_sw10 (0x05A0) 239#define scb_v_sw11 (0x05B0) 240#define scb_v_sw12 (0x05C0) 241#define scb_v_sw13 (0x05D0) 242#define scb_v_sw14 (0x05E0) 243#define scb_v_sw15 (0x05F0) 244#define scb_v_clock (0x0600) 245#define scb_v_inter (0x0610) 246#define scb_v_sys_corr_err (0x0620) 247#define scb_v_proc_corr_err (0x0630) 248#define scb_v_pwrfail (0x0640) 249#define scb_v_perfmon (0x0650) 250#define scb_v_sysmchk (0x0660) 251#define scb_v_procmchk (0x0670) 252#define scb_v_passive_rel (0x06F0) 253 254// 255// Stack frame (FRM) 256// 257 258#define frm_v_r2 (0x0000) 259#define frm_v_r3 (0x0008) 260#define frm_v_r4 (0x0010) 261#define frm_v_r5 (0x0018) 262#define frm_v_r6 (0x0020) 263#define frm_v_r7 (0x0028) 264#define frm_v_pc (0x0030) 265#define frm_v_ps (0x0038) 266 267// 268// Exeception summary register (EXS) 269// 270// exs_v_swc <0> ; Software completion 271// exs_v_inv <1> ; Ivalid operation 272// exs_v_dze <2> ; Div by zero 273// exs_v_fov <3> ; Floating point overflow 274// exs_v_unf <4> ; Floating point underflow 275// exs_v_ine <5> ; Floating point inexact 276// exs_v_iov <6> ; Floating convert to integer overflow 277#define exs_v_swc 0 278#define exs_v_inv 1 279#define exs_v_dze 2 280#define exs_v_fov 3 281#define exs_v_unf 4 282#define exs_v_ine 5 283#define exs_v_iov 6 284 285#define exs_m_swc (1<<exs_v_swc) 286#define exs_m_inv (1<<exs_v_inv) 287#define exs_m_dze (1<<exs_v_dze) 288#define exs_m_fov (1<<exs_v_fov) 289#define exs_m_unf (1<<exs_v_unf) 290#define exs_m_ine (1<<exs_v_ine) 291#define exs_m_iov (1<<exs_v_iov) 292 293// 294// machine check error summary register (mces) 295// 296// mces_v_mchk <0> ; machine check in progress 297// mces_v_sce <1> ; system correctable error 298// mces_v_pce <2> ; processor correctable error 299// mces_v_dpc <3> ; disable reporting of processor correctable errors 300// mces_v_dsc <4> ; disable reporting of system correctable errors 301#define mces_v_mchk 0 302#define mces_v_sce 1 303#define mces_v_pce 2 304#define mces_v_dpc 3 305#define mces_v_dsc 4 306 307#define mces_m_mchk (1<<mces_v_mchk) 308#define mces_m_sce (1<<mces_v_sce) 309#define mces_m_pce (1<<mces_v_pce) 310#define mces_m_dpc (1<<mces_v_dpc) 311#define mces_m_dsc (1<<mces_v_dsc) 312#define mces_m_all ((1<<mces_v_mchk) | (1<<mces_v_sce) | (1<<mces_v_pce) | (1<<mces_v_dpc) | (1<<mces_v_dsc)) 313 314#endif 315