ev5_alpha_defs.h revision 8012
1/* 2Copyright 1993 Hewlett-Packard Development Company, L.P. 3 4Permission is hereby granted, free of charge, to any person obtaining a copy of 5this software and associated documentation files (the "Software"), to deal in 6the Software without restriction, including without limitation the rights to 7use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies 8of the Software, and to permit persons to whom the Software is furnished to do 9so, subject to the following conditions: 10 11The above copyright notice and this permission notice shall be included in all 12copies or substantial portions of the Software. 13 14THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 17AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 19OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 20SOFTWARE. 21*/ 22 23#ifndef EV5_ALPHA_DEFS_INCLUDED 24#define EV5_ALPHA_DEFS_INCLUDED 1 25 26// from ev5_alpha_defs.mar from Lance's fetch directory 27// Lower-caseified and $ signs removed ... pb Nov/95 28 29// .MACRO _ALPHADEFS 30// ALPHADEF_VER == 6 ; Flag the version number of this file. 31// .ENDM 32// .MACRO _PSDEF,_GBL 33// _DEFINI PS,_GBL 34//;+ 35//; PS Layout - PS 36//; Loc Size name function 37//; ------ ------ ______ ----------------------------------- 38//; <31:29> 3 SA stack alignment 39//; <31:13> 24 RES Reserved MBZ 40//; <12:8> 5 IPL Priority level 41//; <7> 1 VMM Virtual Mach Monitor 42//; <6:5> 2 RES Reserved MBZ 43//; <4:3> 2 CM Current Mode 44//; <2> 1 IP Interrupt Pending 45//; <1:0> 2 SW Software bits 46//;- 47 48#define ps_v_sw 0 49#define ps_m_sw (3<<ps_v_sw) 50 51#define ps_v_ip 2 52#define ps_m_ip (1<<ps_v_ip) 53 54#define ps_v_cm 3 55#define ps_m_cm (3<<ps_v_cm) 56 57#define ps_v_vmm 7 58#define ps_m_vmm (1<<ps_v_vmm) 59 60#define ps_v_ipl 8 61#define ps_m_ipl (0x1f<<ps_v_ipl) 62 63#define ps_v_sp (0x38) 64#define ps_m_sp (0x3f<<ps_v_sp) 65 66 67#define ps_c_kern (0x00) 68#define ps_c_exec (0x08) 69#define ps_c_supr (0x10) 70#define ps_c_user (0x18) 71#define ps_c_ipl0 (0x0000) 72#define ps_c_ipl1 (0x0100) 73#define ps_c_ipl2 (0x0200) 74#define ps_c_ipl3 (0x0300) 75#define ps_c_ipl4 (0x0400) 76#define ps_c_ipl5 (0x0500) 77#define ps_c_ipl6 (0x0600) 78#define ps_c_ipl7 (0x0700) 79#define ps_c_ipl8 (0x0800) 80#define ps_c_ipl9 (0x0900) 81#define ps_c_ipl10 (0x0A00) 82#define ps_c_ipl11 (0x0B00) 83#define ps_c_ipl12 (0x0C00) 84#define ps_c_ipl13 (0x0D00) 85#define ps_c_ipl14 (0x0E00) 86#define ps_c_ipl15 (0x0F00) 87#define ps_c_ipl16 (0x1000) 88#define ps_c_ipl17 (0x1100) 89#define ps_c_ipl18 (0x1200) 90#define ps_c_ipl19 (0x1300) 91#define ps_c_ipl20 (0x1400) 92#define ps_c_ipl21 (0x1500) 93#define ps_c_ipl22 (0x1600) 94#define ps_c_ipl23 (0x1700) 95#define ps_c_ipl24 (0x1800) 96#define ps_c_ipl25 (0x1900) 97#define ps_c_ipl26 (0x1A00) 98#define ps_c_ipl27 (0x1B00) 99#define ps_c_ipl28 (0x1C00) 100#define ps_c_ipl29 (0x1D00) 101#define ps_c_ipl30 (0x1E00) 102#define ps_c_ipl31 (0x1F00) 103 104// _DEFEND PS,_GBL,DEF 105// .ENDM 106//;+ 107//; PTE layout - symbol prefix PTE_ 108//; 109//; Loc Size name function 110//; ------ ------ ------ ----------------------------------- 111//; <63:32> 32 PFN Page Frame Number 112//; <31:16> 16 SOFT Bits reserved for software use 113//; <15> 1 UWE User write enable 114//; <14> 1 SWE Super write enable 115//; <13> 1 EWE Exec write enable 116//; <12> 1 KWE Kernel write enable 117//; <11> 1 URE User read enable 118//; <10> 1 SRE Super read enable 119//; <9> 1 ERE Exec read enable 120//; <8> 1 KRE Kernel read enable 121//; <7:6> 2 RES Reserved SBZ 122//; <5> 1 HPF Huge Page Flag 123//; <4> 1 ASM Wild card address space number match 124//; <3> 1 FOE Fault On execute 125//; <2> 1 FOW Fault On Write 126//; <1> 1 FOR Fault On Read 127//; <0> 1 V valid bit 128//;- 129// .MACRO _PTEDEF,_GBL 130// _DEFINI PTE,_GBL 131 132#define pte_v_pfn 32 133#define pte_m_soft (0xFFFF0000) 134#define pte_v_soft 16 135#define pte_m_uwe (0x8000) 136#define pte_v_uwe 15 137#define pte_m_swe (0x4000) 138#define pte_v_swe 14 139#define pte_m_ewe (0x2000) 140#define pte_v_ewe 13 141#define pte_m_kwe (0x1000) 142#define pte_v_kwe 12 143#define pte_m_ure (0x0800) 144#define pte_v_ure 11 145#define pte_m_sre (0x0400) 146#define pte_v_sre 10 147#define pte_m_ere (0x0200) 148#define pte_v_ere 9 149#define pte_m_kre (0x0100) 150#define pte_v_kre 8 151#define pte_m_hpf (0x0020) 152#define pte_v_hpf 5 153#define pte_m_asm (0x0010) 154#define pte_v_asm 4 155#define pte_m_foe (0x0008) 156#define pte_v_foe 3 157#define pte_m_fow (0x0004) 158#define pte_v_fow 2 159#define pte_m_for (0x0002) 160#define pte_v_for 1 161#define pte_m_v (0x0001) 162#define pte_v_v 0 163 164// _DEFEND PTE,_GBL,DEF 165// .ENDM 166//;+ 167//; VA layout - symbol prefix VA_ 168//; 169//; Loc Size name function 170//; ------ ------ ------- ----------------------------------- 171//; <42:33> 10 SEG1 First seg table offset for mapping 172//; <32:23> 10 SEG2 Second seg table offset for mapping 173//; <22:13> 10 SEG3 Third seg table offset for mapping 174//; <12:0> 13 OFFSET Byte within page 175//;- 176// .MACRO _VADEF,_GBL 177// _DEFINI VA,_GBL 178 179#define va_m_offset (0x000000001FFF) 180#define va_v_offset 0 181#define va_m_seg3 (0x0000007FE000) 182#define va_v_seg3 13 183#define va_m_seg2 (0x0001FF800000) 184#define va_v_seg2 23 185#define va_m_seg1 (0x7FE00000000) 186#define va_v_seg1 33 187 188// _DEFEND VA,_GBL,DEF 189// .ENDM 190//;+ 191//; PRIVILEGED CONTEXT BLOCK (PCB) 192//;- 193// .MACRO _PCBDEF,_GBL 194// _DEFINI PCB,_GBL 195#define pcb_q_ksp 0 196#define pcb_q_esp 8 197#define pcb_q_ssp 16 198#define pcb_q_usp 24 199#define pcb_q_ptbr 32 200#define pcb_q_asn 40 201#define pcb_q_ast 48 202#define pcb_q_fen 56 203#define pcb_q_cc 64 204#define pcb_q_unq 72 205#define pcb_q_sct 80 206 207#define pcb_v_asten 0 208#define pcb_m_asten (0x0f<<pcb_v_asten) 209#define pcb_v_astsr 4 210#define pcb_m_astsr (0x0f<<pcb_v_astsr) 211#define pcb_v_dat 63 212#define pcb_v_pme 62 213 214// _DEFEND PCB,_GBL,DEF 215// .ENDM 216//;+ 217//; SYSTEM CONTROL BLOCK (SCB) 218//;- 219// .MACRO _SCBDEF,_GBL 220// _DEFINI SCB,_GBL 221 222#define scb_v_fen (0x0010) 223#define scb_v_acv (0x0080) 224#define scb_v_tnv (0x0090) 225#define scb_v_for (0x00A0) 226#define scb_v_fow (0x00B0) 227#define scb_v_foe (0x00C0) 228#define scb_v_arith (0x0200) 229#define scb_v_kast (0x0240) 230#define scb_v_east (0x0250) 231#define scb_v_sast (0x0260) 232#define scb_v_uast (0x0270) 233#define scb_v_unalign (0x0280) 234#define scb_v_bpt (0x0400) 235#define scb_v_bugchk (0x0410) 236#define scb_v_opcdec (0x0420) 237#define scb_v_illpal (0x0430) 238#define scb_v_trap (0x0440) 239#define scb_v_chmk (0x0480) 240#define scb_v_chme (0x0490) 241#define scb_v_chms (0x04A0) 242#define scb_v_chmu (0x04B0) 243#define scb_v_sw0 (0x0500) 244#define scb_v_sw1 (0x0510) 245#define scb_v_sw2 (0x0520) 246#define scb_v_sw3 (0x0530) 247#define scb_v_sw4 (0x0540) 248#define scb_v_sw5 (0x0550) 249#define scb_v_sw6 (0x0560) 250#define scb_v_sw7 (0x0570) 251#define scb_v_sw8 (0x0580) 252#define scb_v_sw9 (0x0590) 253#define scb_v_sw10 (0x05A0) 254#define scb_v_sw11 (0x05B0) 255#define scb_v_sw12 (0x05C0) 256#define scb_v_sw13 (0x05D0) 257#define scb_v_sw14 (0x05E0) 258#define scb_v_sw15 (0x05F0) 259#define scb_v_clock (0x0600) 260#define scb_v_inter (0x0610) 261#define scb_v_sys_corr_err (0x0620) 262#define scb_v_proc_corr_err (0x0630) 263#define scb_v_pwrfail (0x0640) 264#define scb_v_perfmon (0x0650) 265#define scb_v_sysmchk (0x0660) 266#define scb_v_procmchk (0x0670) 267#define scb_v_passive_rel (0x06F0) 268 269// _DEFEND SCB,_GBL,DEF 270// .ENDM 271//;+ 272//; Stack frame (FRM) 273//;- 274// .MACRO _FRMDEF,_GBL 275// _DEFINI FRM,_GBL 276 277#define frm_v_r2 (0x0000) 278#define frm_v_r3 (0x0008) 279#define frm_v_r4 (0x0010) 280#define frm_v_r5 (0x0018) 281#define frm_v_r6 (0x0020) 282#define frm_v_r7 (0x0028) 283#define frm_v_pc (0x0030) 284#define frm_v_ps (0x0038) 285 286// _DEFEND FRM,_GBL,DEF 287// .ENDM 288//;+ 289//; Exeception summary register (EXS) 290//;- 291// .MACRO _EXSDEF,_GBL 292// _DEFINI EXS,_GBL 293// exs_v_swc <0> ; Software completion 294// exs_v_inv <1> ; Ivalid operation 295// exs_v_dze <2> ; Div by zero 296// exs_v_fov <3> ; Floating point overflow 297// exs_v_unf <4> ; Floating point underflow 298// exs_v_ine <5> ; Floating point inexact 299// exs_v_iov <6> ; Floating convert to integer overflow 300#define exs_v_swc 0 301#define exs_v_inv 1 302#define exs_v_dze 2 303#define exs_v_fov 3 304#define exs_v_unf 4 305#define exs_v_ine 5 306#define exs_v_iov 6 307 308#define exs_m_swc (1<<exs_v_swc) 309#define exs_m_inv (1<<exs_v_inv) 310#define exs_m_dze (1<<exs_v_dze) 311#define exs_m_fov (1<<exs_v_fov) 312#define exs_m_unf (1<<exs_v_unf) 313#define exs_m_ine (1<<exs_v_ine) 314#define exs_m_iov (1<<exs_v_iov) 315 316// _defend exs,_gbl,def 317// .endm 318//;+ 319//; machine check error summary register (mces) 320//;- 321// .macro _mcesdef,_gbl 322// _defini mces,_gbl 323// mces_v_mchk <0> ; machine check in progress 324// mces_v_sce <1> ; system correctable error 325// mces_v_pce <2> ; processor correctable error 326// mces_v_dpc <3> ; disable reporting of processor correctable errors 327// mces_v_dsc <4> ; disable reporting of system correctable errors 328#define mces_v_mchk 0 329#define mces_v_sce 1 330#define mces_v_pce 2 331#define mces_v_dpc 3 332#define mces_v_dsc 4 333 334#define mces_m_mchk (1<<mces_v_mchk) 335#define mces_m_sce (1<<mces_v_sce) 336#define mces_m_pce (1<<mces_v_pce) 337#define mces_m_dpc (1<<mces_v_dpc) 338#define mces_m_dsc (1<<mces_v_dsc) 339#define mces_m_all ((1<<mces_v_mchk) | (1<<mces_v_sce) | (1<<mces_v_pce) | (1<<mces_v_dpc) | (1<<mces_v_dsc)) 340// _defend mces,_gbl,def 341// .endm 342 343 344 345#endif 346