1/***************************************************************************** 2 3 Licensed to Accellera Systems Initiative Inc. (Accellera) under one or 4 more contributor license agreements. See the NOTICE file distributed 5 with this work for additional information regarding copyright ownership. 6 Accellera licenses this file to you under the Apache License, Version 2.0 7 (the "License"); you may not use this file except in compliance with the 8 License. You may obtain a copy of the License at 9 10 http://www.apache.org/licenses/LICENSE-2.0 11 12 Unless required by applicable law or agreed to in writing, software 13 distributed under the License is distributed on an "AS IS" BASIS, 14 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or 15 implied. See the License for the specific language governing 16 permissions and limitations under the License. 17 18 *****************************************************************************/ 19 20/***************************************************************************** 21 22 star111657.cpp -- 23 24 Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 25 26 *****************************************************************************/ 27 28/***************************************************************************** 29 30 MODIFICATION LOG - modifiers, enter your name, affiliation, date and 31 changes you are making here. 32 33 Name, Affiliation, Date: 34 Description of Modification: 35 36 *****************************************************************************/ 37 38/*############################################################################ 39# Siemens AG copyright 2000 40# All Rights Reserved 41# 42# File name : io_controller.cpp 43# 44# Title : I/O-Controller 45# 46# Purpose : functionality for I/O-Controller-module 47# 48# Author : Hannes Muhr 49# PSE EZE MSA 50# 51############################################################################## 52# Modification History : 53# 54# 55##############################################################################*/ 56 57#include "systemc.h" 58#include "io_controller1.h" 59 60 61void io_controller_m::mux(){ 62 63 sc_uint<32> data; 64 65 while (true){ 66 while (start_mux.read() == 0) wait(); 67 #ifdef LOGGING 68 flog << sc_time_stamp()<<": "<<name()<<"::select - enabled" << endl; 69 #endif 70 mii_en_o = 1; 71 for (int i = 0; i < MII_FRAME_SIZE; i++){ 72 data = shared_mem1[i]; 73 74 mii_data4_o = data.range(3,0); 75 wait(); 76 mii_data4_o = data.range(7,4); 77 wait(); 78 mii_data4_o = data.range(11,8); 79 wait(); 80 mii_data4_o = data.range(15,12); 81 wait(); 82 mii_data4_o = data.range(19,16); 83 wait(); 84 mii_data4_o = data.range(23,20); 85 wait(); 86 mii_data4_o = data.range(27,24); 87 wait(); 88 mii_data4_o = data.range(31,28); 89 wait(); 90 } 91 mii_en_o = 0; 92 mii_data4_o = 0; 93 ready_mux = 1; 94 wait(); 95 ready_mux = 0; 96 wait(); 97 } 98} 99 100void io_controller_m::shift(){ 101 102 sc_uint<32> data; 103 104 while (true){ 105 while (mii_en_i.read() == false) wait(); 106 #ifdef LOGGING 107 flog << sc_time_stamp()<<": "<<name()<<"::collect - enabled" << endl; 108 #endif 109 110 for (int i = 0; i < MII_FRAME_SIZE; i++){ 111 data.range(3,0) = mii_data4_i; 112 wait(); 113 data.range(7,4) = mii_data4_i; 114 wait(); 115 data.range(11,8) = mii_data4_i; 116 wait(); 117 data.range(15,12) = mii_data4_i; 118 wait(); 119 data.range(19,16) = mii_data4_i; 120 wait(); 121 data.range(23,20) = mii_data4_i; 122 wait(); 123 data.range(27,24) = mii_data4_i; 124 wait(); 125 data.range(31,28) = mii_data4_i; 126 shared_mem2[i] = data; 127 wait(); 128 } 129 start_read = 1; 130 wait(); 131 start_read = 0; 132 wait(); 133 } 134} 135 136sc_uint<32> io_controller_m::read_from_memory0(sc_uint<32> mp){ 137 138 // read from mbdatm-memory over i486-IF 139 140 addr30_o1 = mp >> 2; 141 ads_n_o1 = 0; 142 wr_n_o1 = 0; 143 wait(); 144 ads_n_o1 = 1; 145 while (rdy_n_i.read() == 1) wait(); 146 sc_uint<32> data = data32_i.read(); 147 wr_n_o1 = 1; 148 addr30_o1 = 0; 149 return data; 150} 151 152sc_uint<32> io_controller_m::read_from_memory1(sc_uint<32> mp){ 153 154 // read from mbdatm-memory over i486-IF 155 156 addr30_o2 = mp >> 2; 157 ads_n_o2 = 0; 158 wr_n_o2 = 0; 159 wait(); 160 ads_n_o2 = 1; 161 while (rdy_n_i.read() == 1) wait(); 162 sc_uint<32> data = data32_i.read(); 163 wr_n_o2 = 1; 164 addr30_o2 = 0; 165 return data; 166} 167 168void io_controller_m::write_into_memory0(sc_uint<32> mp, sc_uint<32> data){ 169 170 addr30_o1 = mp >> 2; 171 ads_n_o1 = 0; 172 wr_n_o1 = 1; 173 wait(); 174 ads_n_o1 = 1; 175 data32_o1 = data; 176 while (rdy_n_i.read() == 1) wait(); 177 wr_n_o1 = 1; 178 addr30_o1 = 0; 179 data32_o1 = 0; 180} 181 182void io_controller_m::write_into_memory1(sc_uint<32> mp, sc_uint<32> data){ 183 184 addr30_o2 = mp >> 2; 185 ads_n_o2 = 0; 186 wr_n_o2 = 1; 187 wait(); 188 ads_n_o2 = 1; 189 data32_o2 = data; 190 while (rdy_n_i.read() == 1) wait(); 191 wr_n_o2 = 1; 192 addr30_o2 = 0; 193 data32_o2 = 0; 194} 195 196void io_controller_m::control_write(){ 197 sc_uint<32> word_cnt; 198 199 while (res_n_i.read() == 0) wait(); 200 201 // initialize 202 203 // wait for 1. AR (HWS-Daten) 204 while (ar_i.read() == 0) wait(); 205 sc_uint<32> hws = data32_i.read(); 206 207 wait(); 208 209 // wait for 2. AR (ACB-Pointer) 210 while (ar_i.read() == 0) wait(); 211 addr_tx_frame_ptr = data32_i.read(); 212 wait(); 213 214 215 while(true){ 216 // normally Attention Request - Signal from MBDATM 217 // would wake up IO-Controller to read data from the memory, 218 // but the model from Hr. Wahl said: wait for some ms !!! 219 220 wait(1000); 221 222 #ifdef LOGGING 223 flog << sc_time_stamp()<<": "<<name()<<"::control_write - Attention Request" << endl; 224 #endif 225 226 while (sem2) wait(); sem2 = true; // P-operation 227 sc_uint<32> tx_frame_ptr = read_from_memory0(addr_tx_frame_ptr); 228 if (tx_frame_ptr != 0) 229 word_cnt = read_from_memory0(tx_frame_ptr+(MII_FRAME_SIZE+1)*4); 230 sem2 = false; // V-operation 231 232 // check, if frame available and frame is full (word_cnt == MII_FRAME_SIZE) 233 234 while (tx_frame_ptr != 0 && word_cnt == MII_FRAME_SIZE){ 235 #ifdef LOGGING 236 flog << sc_time_stamp()<<": "<<name()<<"::control_write - writing mii_frame into out_fifo" << endl; 237 #endif 238 239 240 for (int i = 0; i<MII_FRAME_SIZE; i++){ 241 // reading from i486-IF and writing into 242 // out_fifo is mixed, so read_from_memory could not be applied 243 244 while (sem2) wait(); sem2 = true; // P-operation 245 sc_uint<32> data = read_from_memory0(tx_frame_ptr+i*4); 246 sem2 = false; // V-operation 247 248 if (i == 0){ 249 start_mux = 1; 250 shared_mem1[i] = data; 251 wait(); 252 start_mux = 0; 253 } 254 else { 255 shared_mem1[i] = data; 256 wait(); 257 } 258 // wait(); ?? 259 } 260 261 while (ready_mux.read() == 0) wait(); 262 263 // write 0xFFFFFFFF (>MII_FRAME_SIZE) into tx_frame_ptr 264 // to signal software in mbdatm that io-controller has 265 // read out the frames and sent successfully 266 while (sem2) wait(); sem2 = true; // P-operation 267 write_into_memory0(tx_frame_ptr+(MII_FRAME_SIZE+1)*4, 0xFFFFFFFF); 268 sem2 = false; // V-operation 269 270 // read next frame_pointer and word_cnt from MBDATM 271 while (sem2) wait(); sem2 = true; // P-operation 272 tx_frame_ptr = read_from_memory0(tx_frame_ptr+MII_FRAME_SIZE*4); 273 if (tx_frame_ptr != 0) 274 word_cnt = read_from_memory0(tx_frame_ptr+(MII_FRAME_SIZE+1)*4); 275 sem2 = false; // V-operation 276 277 278 } 279 280 } 281} 282 283void io_controller_m::control_read(){ 284 285 int arr_ptr = 0; 286 287 while (true){ 288 while (start_read.read() == 0) wait(); 289 #ifdef LOGGING 290 flog << sc_time_stamp()<<": "<<name()<<"::control_read " << endl; 291 #endif 292 293 // read rx_frame_ptr from MBDATM 294 while (sem1) wait(); sem1 = true; // P-operation 295 sc_uint<32> rx_frame_ptr = read_from_memory1(rx_ptr_array+arr_ptr*4); 296 sem1 = false; // V-operation 297 /*if (rx_frame_ptr == 0){ 298 cerr << "\nIO-Controller has read NULL-ptr from rx_array in MBDATM\n"; 299 cerr << "MBDATM did not fill rx_array fast enough\n"; 300 exit(-1); 301 }*/ 302 if (++arr_ptr == MII_FRAME_SIZE) 303 arr_ptr = 0; 304 305 // write data from in_fifo into MBDATM-memory 306 for (int i = 0; i < MII_FRAME_SIZE; i++){ 307 sc_uint<32> d = shared_mem2[i]; 308 // grab the semaphore 309 while (sem1) wait(); sem1 = true; // P-operation 310 write_into_memory1(rx_frame_ptr + i*4, d); 311 // release semaphore 312 sem1 = false; // V-operation 313 wait(); 314 315 } 316 317 // write 0xFFFFFFFF into word_cnt from frame 318 // to indicate the software (MBDATM) that frame has been filled 319 while (sem1) wait(); sem1 = true; // P-operation 320 write_into_memory1(rx_frame_ptr + (MII_FRAME_SIZE+1)*4, 0xFFFFFFFF); 321 sem1 = false; // V-operation 322 } 323} 324 325