1/***************************************************************************** 2 3 Licensed to Accellera Systems Initiative Inc. (Accellera) under one or 4 more contributor license agreements. See the NOTICE file distributed 5 with this work for additional information regarding copyright ownership. 6 Accellera licenses this file to you under the Apache License, Version 2.0 7 (the "License"); you may not use this file except in compliance with the 8 License. You may obtain a copy of the License at 9 10 http://www.apache.org/licenses/LICENSE-2.0 11 12 Unless required by applicable law or agreed to in writing, software 13 distributed under the License is distributed on an "AS IS" BASIS, 14 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or 15 implied. See the License for the specific language governing 16 permissions and limitations under the License. 17 18 *****************************************************************************/ 19 20/***************************************************************************** 21 22 test06.cpp -- 23 24 Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 25 Martin Janssen, Synopsys, Inc., 2002-02-15 26 27 *****************************************************************************/ 28 29/***************************************************************************** 30 31 MODIFICATION LOG - modifiers, enter your name, affiliation, date and 32 changes you are making here. 33 34 Name, Affiliation, Date: 35 Description of Modification: 36 37 *****************************************************************************/ 38 39//test of sc_prim_channel::next_trigger(double, sc_time_unit, sc_event_or_list&) 40 41#include <systemc.h> 42 43//write and read interfaces 44class write_if : virtual public 45sc_interface 46 { 47 public: 48 virtual void write() = 0; 49}; 50 51class read_if : virtual public 52sc_interface 53{ 54 public: 55 virtual void read( ) = 0; 56}; 57 58// channel implements write_if and read_if interfaces 59class channel : 60 public sc_channel, 61 public write_if, 62 public read_if 63{ 64 65 public : 66 67 //constructor 68 channel(sc_module_name name):sc_channel(name) , data(0) 69 { } 70 71 //write to channel 72 void write(){ 73 static int i = 0; 74 next_trigger(10, SC_NS); 75 data = i; 76 cout <<"simulation time" << ":" << sc_time_stamp()<<" "; 77 cout<<"writting "<< data <<" to channel" << endl; 78 79 if(i < 3){ 80 write_event_1.notify(20, SC_NS); 81 } 82 else if(3 <= i && i < 6) { 83 write_event_1.notify(5, SC_NS); 84 } 85 else{ 86 write_event_2.notify(6, SC_NS); 87 } 88 89 i++; 90 } 91 92 //read from channel 93 void read( ){ 94 int j; 95 next_trigger(10, SC_NS, write_event_1 | write_event_2); 96 j = data; 97 cout <<"simulation time" << ":" << sc_time_stamp(); 98 cout<<" reading "<<j<<" from channel" << endl; 99 } 100 101 private: 102 int data; 103 sc_event write_event_1, write_event_2; 104 105}; 106 107//source module 108SC_MODULE(mod_a) 109{ 110 sc_port<write_if> out; 111 112 void write( ) 113 { 114 out->write(); 115 } 116 117 SC_CTOR( mod_a ){ 118 119 SC_METHOD(write); 120 } 121}; 122 123//sink module 124SC_MODULE(mod_b) 125{ 126 sc_port<read_if> input; 127 int i; 128 129 void read( ) 130 { 131 input->read(); 132 } 133 134 SC_CTOR( mod_b ){ 135 136 SC_METHOD(read); 137 } 138}; 139 140 141int sc_main(int, char*[] ) 142{ 143 channel a("a"); 144 mod_a modul_a("modul_a"); 145 mod_b modul_b("modul_b"); 146 modul_a.out(a); 147 modul_b.input(a); 148 149 sc_start(120, SC_NS); 150 return 0 ; 151} 152