1/***************************************************************************** 2 3 Licensed to Accellera Systems Initiative Inc. (Accellera) under one or 4 more contributor license agreements. See the NOTICE file distributed 5 with this work for additional information regarding copyright ownership. 6 Accellera licenses this file to you under the Apache License, Version 2.0 7 (the "License"); you may not use this file except in compliance with the 8 License. You may obtain a copy of the License at 9 10 http://www.apache.org/licenses/LICENSE-2.0 11 12 Unless required by applicable law or agreed to in writing, software 13 distributed under the License is distributed on an "AS IS" BASIS, 14 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or 15 implied. See the License for the specific language governing 16 permissions and limitations under the License. 17 18 *****************************************************************************/ 19 20/***************************************************************************** 21 22 test05.cpp -- 23 24 Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 25 Martin Janssen, Synopsys, Inc., 2002-02-15 26 27 *****************************************************************************/ 28 29/***************************************************************************** 30 31 MODIFICATION LOG - modifiers, enter your name, affiliation, date and 32 changes you are making here. 33 34 Name, Affiliation, Date: 35 Description of Modification: 36 37 *****************************************************************************/ 38 39//test of sc_prim_channel::next_trigger(double, sc_time_unit, sc_event_and_list&) 40 41#include <systemc.h> 42 43//write and read interfaces 44class write_if : virtual public 45sc_interface 46 { 47 public: 48 virtual void write() = 0; 49}; 50 51class read_if : virtual public 52sc_interface 53{ 54 public: 55 virtual void read( ) = 0; 56}; 57 58// channel implements write_if and read_if interfaces 59class channel : 60 public sc_channel, 61 public write_if, 62 public read_if 63{ 64 65 public : 66 67 //constructor 68 channel(sc_module_name name):sc_channel(name) , data(0) 69 { } 70 71 //write to channel 72 void write(){ 73 static int i = 0; 74 next_trigger(10, SC_NS); 75 data = i; 76 cout <<"simulation time" << ":" << sc_time_stamp()<<" "; 77 cout<<"writing "<< data <<" to channel" << endl; 78 79 if(i < 3){ 80 write_event_1.notify(20, SC_NS); 81 } 82 else if(3 <= i && i < 6) { 83 write_event_2.notify(5, SC_NS); 84 } 85 else{ 86 write_event_2.notify(5, SC_NS); 87 write_event_1.notify(5, SC_NS); 88 } 89 90 i++; 91 } 92 93 //read from channel 94 void read( ){ 95 int j; 96 next_trigger(10, SC_NS, write_event_1 & write_event_2); 97 j = data; 98 cout <<"simulation time" << ":" << sc_time_stamp(); 99 cout<<" reading "<<j<<" from channel" << endl; 100 } 101 102 private: 103 int data; 104 sc_event write_event_1, write_event_2; 105 106}; 107 108//source module 109SC_MODULE(mod_a) 110{ 111 sc_port<write_if> out; 112 113 void write( ) 114 { 115 out->write(); 116 } 117 118 SC_CTOR( mod_a ){ 119 120 SC_METHOD(write); 121 } 122}; 123 124//sink module 125SC_MODULE(mod_b) 126{ 127 sc_port<read_if> input; 128 int i; 129 130 void read( ) 131 { 132 input->read(); 133 } 134 135 SC_CTOR( mod_b ){ 136 137 SC_METHOD(read); 138 } 139}; 140 141 142int sc_main(int, char*[] ) 143{ 144 channel a("a"); 145 mod_a modul_a("modul_a"); 146 mod_b modul_b("modul_b"); 147 modul_a.out(a); 148 modul_b.input(a); 149 150 sc_start(120, SC_NS); 151 return 0 ; 152} 153