pseudo_inst.cc revision 9952 
1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2011 Advanced Micro Devices, Inc.
15 * Copyright (c) 2003-2006 The Regents of The University of Michigan
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Nathan Binkert
42 */
43
44#include <fcntl.h>
45#include <unistd.h>
46
47#include <cerrno>
48#include <fstream>
49#include <string>
50#include <vector>
51
52#include "arch/kernel_stats.hh"
53#include "arch/utility.hh"
54#include "arch/vtophys.hh"
55#include "base/debug.hh"
56#include "base/output.hh"
57#include "config/the_isa.hh"
58#include "cpu/base.hh"
59#include "cpu/quiesce_event.hh"
60#include "cpu/thread_context.hh"
61#include "debug/Loader.hh"
62#include "debug/PseudoInst.hh"
63#include "debug/Quiesce.hh"
64#include "debug/WorkItems.hh"
65#include "params/BaseCPU.hh"
66#include "sim/full_system.hh"
67#include "sim/pseudo_inst.hh"
68#include "sim/serialize.hh"
69#include "sim/sim_events.hh"
70#include "sim/sim_exit.hh"
71#include "sim/stat_control.hh"
72#include "sim/stats.hh"
73#include "sim/system.hh"
74#include "sim/vptr.hh"
75
76using namespace std;
77
78using namespace Stats;
79using namespace TheISA;
80
81namespace PseudoInst {
82
83static inline void
84panicFsOnlyPseudoInst(const char *name)
85{
86    panic("Pseudo inst \"%s\" is only available in Full System mode.");
87}
88
89uint64_t
90pseudoInst(ThreadContext *tc, uint8_t func, uint8_t subfunc)
91{
92    uint64_t args[4];
93
94    DPRINTF(PseudoInst, "PseudoInst::pseudoInst(%i, %i)\n", func, subfunc);
95
96    // We need to do this in a slightly convoluted way since
97    // getArgument() might have side-effects on arg_num. We could have
98    // used the Argument class, but due to the possible side effects
99    // from getArgument, it'd most likely break.
100    int arg_num(0);
101    for (int i = 0; i < sizeof(args) / sizeof(*args); ++i) {
102        args[arg_num] = getArgument(tc, arg_num, sizeof(uint64_t), false);
103        ++arg_num;
104    }
105
106    switch (func) {
107      case 0x00: // arm_func
108        arm(tc);
109        break;
110
111      case 0x01: // quiesce_func
112        quiesce(tc);
113        break;
114
115      case 0x02: // quiescens_func
116        quiesceSkip(tc);
117        break;
118
119      case 0x03: // quiescecycle_func
120        quiesceNs(tc, args[0]);
121        break;
122
123      case 0x04: // quiescetime_func
124        return quiesceTime(tc);
125
126      case 0x07: // rpns_func
127        return rpns(tc);
128
129      case 0x09: // wakecpu_func
130        wakeCPU(tc, args[0]);
131        break;
132
133      case 0x21: // exit_func
134        m5exit(tc, args[0]);
135        break;
136
137      case 0x22:
138        m5fail(tc, args[0], args[1]);
139        break;
140
141      case 0x30: // initparam_func
142        return initParam(tc);
143
144      case 0x31: // loadsymbol_func
145        loadsymbol(tc);
146        break;
147
148      case 0x40: // resetstats_func
149        resetstats(tc, args[0], args[1]);
150        break;
151
152      case 0x41: // dumpstats_func
153        dumpstats(tc, args[0], args[1]);
154        break;
155
156      case 0x42: // dumprststats_func
157        dumpresetstats(tc, args[0], args[1]);
158        break;
159
160      case 0x43: // ckpt_func
161        m5checkpoint(tc, args[0], args[1]);
162        break;
163
164      case 0x4f: // writefile_func
165        return writefile(tc, args[0], args[1], args[2], args[3]);
166
167      case 0x50: // readfile_func
168        return readfile(tc, args[0], args[1], args[2]);
169
170      case 0x51: // debugbreak_func
171        debugbreak(tc);
172        break;
173
174      case 0x52: // switchcpu_func
175        switchcpu(tc);
176        break;
177
178      case 0x53: // addsymbol_func
179        addsymbol(tc, args[0], args[1]);
180        break;
181
182      case 0x54: // panic_func
183        panic("M5 panic instruction called at %s\n", tc->pcState());
184
185      case 0x5a: // work_begin_func
186        workbegin(tc, args[0], args[1]);
187        break;
188
189      case 0x5b: // work_end_func
190        workend(tc, args[0], args[1]);
191        break;
192
193      case 0x55: // annotate_func
194      case 0x56: // reserved2_func
195      case 0x57: // reserved3_func
196      case 0x58: // reserved4_func
197      case 0x59: // reserved5_func
198        warn("Unimplemented m5 op (0x%x)\n", func);
199        break;
200
201      default:
202        warn("Unhandled m5 op: 0x%x\n", func);
203        break;
204    }
205
206    return 0;
207}
208
209void
210arm(ThreadContext *tc)
211{
212    DPRINTF(PseudoInst, "PseudoInst::arm()\n");
213    if (!FullSystem)
214        panicFsOnlyPseudoInst("arm");
215
216    if (tc->getKernelStats())
217        tc->getKernelStats()->arm();
218}
219
220void
221quiesce(ThreadContext *tc)
222{
223    DPRINTF(PseudoInst, "PseudoInst::quiesce()\n");
224    if (!FullSystem)
225        panicFsOnlyPseudoInst("quiesce");
226
227    if (!tc->getCpuPtr()->params()->do_quiesce)
228        return;
229
230    DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name());
231
232    tc->suspend();
233    if (tc->getKernelStats())
234        tc->getKernelStats()->quiesce();
235}
236
237void
238quiesceSkip(ThreadContext *tc)
239{
240    DPRINTF(PseudoInst, "PseudoInst::quiesceSkip()\n");
241    if (!FullSystem)
242        panicFsOnlyPseudoInst("quiesceSkip");
243
244    BaseCPU *cpu = tc->getCpuPtr();
245
246    if (!cpu->params()->do_quiesce)
247        return;
248
249    EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
250
251    Tick resume = curTick() + 1;
252
253    cpu->reschedule(quiesceEvent, resume, true);
254
255    DPRINTF(Quiesce, "%s: quiesceSkip() until %d\n",
256            cpu->name(), resume);
257
258    tc->suspend();
259    if (tc->getKernelStats())
260        tc->getKernelStats()->quiesce();
261}
262
263void
264quiesceNs(ThreadContext *tc, uint64_t ns)
265{
266    DPRINTF(PseudoInst, "PseudoInst::quiesceNs(%i)\n", ns);
267    if (!FullSystem)
268        panicFsOnlyPseudoInst("quiesceNs");
269
270    BaseCPU *cpu = tc->getCpuPtr();
271
272    if (!cpu->params()->do_quiesce || ns == 0)
273        return;
274
275    EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
276
277    Tick resume = curTick() + SimClock::Int::ns * ns;
278
279    cpu->reschedule(quiesceEvent, resume, true);
280
281    DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n",
282            cpu->name(), ns, resume);
283
284    tc->suspend();
285    if (tc->getKernelStats())
286        tc->getKernelStats()->quiesce();
287}
288
289void
290quiesceCycles(ThreadContext *tc, uint64_t cycles)
291{
292    DPRINTF(PseudoInst, "PseudoInst::quiesceCycles(%i)\n", cycles);
293    if (!FullSystem)
294        panicFsOnlyPseudoInst("quiesceCycles");
295
296    BaseCPU *cpu = tc->getCpuPtr();
297
298    if (!cpu->params()->do_quiesce || cycles == 0)
299        return;
300
301    EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
302
303    Tick resume = cpu->clockEdge(Cycles(cycles));
304
305    cpu->reschedule(quiesceEvent, resume, true);
306
307    DPRINTF(Quiesce, "%s: quiesceCycles(%d) until %d\n",
308            cpu->name(), cycles, resume);
309
310    tc->suspend();
311    if (tc->getKernelStats())
312        tc->getKernelStats()->quiesce();
313}
314
315uint64_t
316quiesceTime(ThreadContext *tc)
317{
318    DPRINTF(PseudoInst, "PseudoInst::quiesceTime()\n");
319    if (!FullSystem) {
320        panicFsOnlyPseudoInst("quiesceTime");
321        return 0;
322    }
323
324    return (tc->readLastActivate() - tc->readLastSuspend()) /
325        SimClock::Int::ns;
326}
327
328uint64_t
329rpns(ThreadContext *tc)
330{
331    DPRINTF(PseudoInst, "PseudoInst::rpns()\n");
332    return curTick() / SimClock::Int::ns;
333}
334
335void
336wakeCPU(ThreadContext *tc, uint64_t cpuid)
337{
338    DPRINTF(PseudoInst, "PseudoInst::wakeCPU(%i)\n", cpuid);
339    System *sys = tc->getSystemPtr();
340    ThreadContext *other_tc = sys->threadContexts[cpuid];
341    if (other_tc->status() == ThreadContext::Suspended)
342        other_tc->activate();
343}
344
345void
346m5exit(ThreadContext *tc, Tick delay)
347{
348    DPRINTF(PseudoInst, "PseudoInst::m5exit(%i)\n", delay);
349    Tick when = curTick() + delay * SimClock::Int::ns;
350    exitSimLoop("m5_exit instruction encountered", 0, when, 0, true);
351}
352
353void
354m5fail(ThreadContext *tc, Tick delay, uint64_t code)
355{
356    DPRINTF(PseudoInst, "PseudoInst::m5fail(%i, %i)\n", delay, code);
357    Tick when = curTick() + delay * SimClock::Int::ns;
358    exitSimLoop("m5_fail instruction encountered", code, when, 0, true);
359}
360
361void
362loadsymbol(ThreadContext *tc)
363{
364    DPRINTF(PseudoInst, "PseudoInst::loadsymbol()\n");
365    if (!FullSystem)
366        panicFsOnlyPseudoInst("loadsymbol");
367
368    const string &filename = tc->getCpuPtr()->system->params()->symbolfile;
369    if (filename.empty()) {
370        return;
371    }
372
373    std::string buffer;
374    ifstream file(filename.c_str());
375
376    if (!file)
377        fatal("file error: Can't open symbol table file %s\n", filename);
378
379    while (!file.eof()) {
380        getline(file, buffer);
381
382        if (buffer.empty())
383            continue;
384
385        string::size_type idx = buffer.find(' ');
386        if (idx == string::npos)
387            continue;
388
389        string address = "0x" + buffer.substr(0, idx);
390        eat_white(address);
391        if (address.empty())
392            continue;
393
394        // Skip over letter and space
395        string symbol = buffer.substr(idx + 3);
396        eat_white(symbol);
397        if (symbol.empty())
398            continue;
399
400        Addr addr;
401        if (!to_number(address, addr))
402            continue;
403
404        if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol))
405            continue;
406
407
408        DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
409    }
410    file.close();
411}
412
413void
414addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
415{
416    DPRINTF(PseudoInst, "PseudoInst::addsymbol(0x%x, 0x%x)\n",
417            addr, symbolAddr);
418    if (!FullSystem)
419        panicFsOnlyPseudoInst("addSymbol");
420
421    char symb[100];
422    CopyStringOut(tc, symb, symbolAddr, 100);
423    std::string symbol(symb);
424
425    DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
426
427    tc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
428    debugSymbolTable->insert(addr,symbol);
429}
430
431uint64_t
432initParam(ThreadContext *tc)
433{
434    DPRINTF(PseudoInst, "PseudoInst::initParam()\n");
435    if (!FullSystem) {
436        panicFsOnlyPseudoInst("initParam");
437        return 0;
438    }
439
440    return tc->getCpuPtr()->system->init_param;
441}
442
443
444void
445resetstats(ThreadContext *tc, Tick delay, Tick period)
446{
447    DPRINTF(PseudoInst, "PseudoInst::resetstats(%i, %i)\n", delay, period);
448    if (!tc->getCpuPtr()->params()->do_statistics_insts)
449        return;
450
451
452    Tick when = curTick() + delay * SimClock::Int::ns;
453    Tick repeat = period * SimClock::Int::ns;
454
455    Stats::schedStatEvent(false, true, when, repeat);
456}
457
458void
459dumpstats(ThreadContext *tc, Tick delay, Tick period)
460{
461    DPRINTF(PseudoInst, "PseudoInst::dumpstats(%i, %i)\n", delay, period);
462    if (!tc->getCpuPtr()->params()->do_statistics_insts)
463        return;
464
465
466    Tick when = curTick() + delay * SimClock::Int::ns;
467    Tick repeat = period * SimClock::Int::ns;
468
469    Stats::schedStatEvent(true, false, when, repeat);
470}
471
472void
473dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
474{
475    DPRINTF(PseudoInst, "PseudoInst::dumpresetstats(%i, %i)\n", delay, period);
476    if (!tc->getCpuPtr()->params()->do_statistics_insts)
477        return;
478
479
480    Tick when = curTick() + delay * SimClock::Int::ns;
481    Tick repeat = period * SimClock::Int::ns;
482
483    Stats::schedStatEvent(true, true, when, repeat);
484}
485
486void
487m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
488{
489    DPRINTF(PseudoInst, "PseudoInst::m5checkpoint(%i, %i)\n", delay, period);
490    if (!tc->getCpuPtr()->params()->do_checkpoint_insts)
491        return;
492
493    Tick when = curTick() + delay * SimClock::Int::ns;
494    Tick repeat = period * SimClock::Int::ns;
495
496    exitSimLoop("checkpoint", 0, when, repeat);
497}
498
499uint64_t
500readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
501{
502    DPRINTF(PseudoInst, "PseudoInst::readfile(0x%x, 0x%x, 0x%x)\n",
503            vaddr, len, offset);
504    if (!FullSystem) {
505        panicFsOnlyPseudoInst("readfile");
506        return 0;
507    }
508
509    const string &file = tc->getSystemPtr()->params()->readfile;
510    if (file.empty()) {
511        return ULL(0);
512    }
513
514    uint64_t result = 0;
515
516    int fd = ::open(file.c_str(), O_RDONLY, 0);
517    if (fd < 0)
518        panic("could not open file %s\n", file);
519
520    if (::lseek(fd, offset, SEEK_SET) < 0)
521        panic("could not seek: %s", strerror(errno));
522
523    char *buf = new char[len];
524    char *p = buf;
525    while (len > 0) {
526        int bytes = ::read(fd, p, len);
527        if (bytes <= 0)
528            break;
529
530        p += bytes;
531        result += bytes;
532        len -= bytes;
533    }
534
535    close(fd);
536    CopyIn(tc, vaddr, buf, result);
537    delete [] buf;
538    return result;
539}
540
541uint64_t
542writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset,
543            Addr filename_addr)
544{
545    DPRINTF(PseudoInst, "PseudoInst::writefile(0x%x, 0x%x, 0x%x, 0x%x)\n",
546            vaddr, len, offset, filename_addr);
547    ostream *os;
548
549    // copy out target filename
550    char fn[100];
551    std::string filename;
552    CopyStringOut(tc, fn, filename_addr, 100);
553    filename = std::string(fn);
554
555    if (offset == 0) {
556        // create a new file (truncate)
557        os = simout.create(filename, true);
558    } else {
559        // do not truncate file if offset is non-zero
560        // (ios::in flag is required as well to keep the existing data
561        //  intact, otherwise existing data will be zeroed out.)
562        os = simout.openFile(simout.directory() + filename,
563                            ios::in | ios::out | ios::binary);
564    }
565    if (!os)
566        panic("could not open file %s\n", filename);
567
568    // seek to offset
569    os->seekp(offset);
570
571    // copy out data and write to file
572    char *buf = new char[len];
573    CopyOut(tc, buf, vaddr, len);
574    os->write(buf, len);
575    if (os->fail() || os->bad())
576        panic("Error while doing writefile!\n");
577
578    simout.close(os);
579
580    delete [] buf;
581
582    return len;
583}
584
585void
586debugbreak(ThreadContext *tc)
587{
588    DPRINTF(PseudoInst, "PseudoInst::debugbreak()\n");
589    Debug::breakpoint();
590}
591
592void
593switchcpu(ThreadContext *tc)
594{
595    DPRINTF(PseudoInst, "PseudoInst::switchcpu()\n");
596    exitSimLoop("switchcpu");
597}
598
599//
600// This function is executed when annotated work items begin.  Depending on
601// what the user specified at the command line, the simulation may exit and/or
602// take a checkpoint when a certain work item begins.
603//
604void
605workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid)
606{
607    DPRINTF(PseudoInst, "PseudoInst::workbegin(%i, %i)\n", workid, threadid);
608    tc->getCpuPtr()->workItemBegin();
609    System *sys = tc->getSystemPtr();
610    const System::Params *params = sys->params();
611    sys->workItemBegin(threadid, workid);
612
613    DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid,
614            threadid);
615
616    //
617    // If specified, determine if this is the specific work item the user
618    // identified
619    //
620    if (params->work_item_id == -1 || params->work_item_id == workid) {
621
622        uint64_t systemWorkBeginCount = sys->incWorkItemsBegin();
623        int cpuId = tc->getCpuPtr()->cpuId();
624
625        if (params->work_cpus_ckpt_count != 0 &&
626            sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
627            //
628            // If active cpus equals checkpoint count, create checkpoint
629            //
630            exitSimLoop("checkpoint");
631        }
632
633        if (systemWorkBeginCount == params->work_begin_ckpt_count) {
634            //
635            // Note: the string specified as the cause of the exit event must
636            // exactly equal "checkpoint" inorder to create a checkpoint
637            //
638            exitSimLoop("checkpoint");
639        }
640
641        if (systemWorkBeginCount == params->work_begin_exit_count) {
642            //
643            // If a certain number of work items started, exit simulation
644            //
645            exitSimLoop("work started count reach");
646        }
647
648        if (cpuId == params->work_begin_cpu_id_exit) {
649            //
650            // If work started on the cpu id specified, exit simulation
651            //
652            exitSimLoop("work started on specific cpu");
653        }
654    }
655}
656
657//
658// This function is executed when annotated work items end.  Depending on
659// what the user specified at the command line, the simulation may exit and/or
660// take a checkpoint when a certain work item ends.
661//
662void
663workend(ThreadContext *tc, uint64_t workid, uint64_t threadid)
664{
665    DPRINTF(PseudoInst, "PseudoInst::workend(%i, %i)\n", workid, threadid);
666    tc->getCpuPtr()->workItemEnd();
667    System *sys = tc->getSystemPtr();
668    const System::Params *params = sys->params();
669    sys->workItemEnd(threadid, workid);
670
671    DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid);
672
673    //
674    // If specified, determine if this is the specific work item the user
675    // identified
676    //
677    if (params->work_item_id == -1 || params->work_item_id == workid) {
678
679        uint64_t systemWorkEndCount = sys->incWorkItemsEnd();
680        int cpuId = tc->getCpuPtr()->cpuId();
681
682        if (params->work_cpus_ckpt_count != 0 &&
683            sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
684            //
685            // If active cpus equals checkpoint count, create checkpoint
686            //
687            exitSimLoop("checkpoint");
688        }
689
690        if (params->work_end_ckpt_count != 0 &&
691            systemWorkEndCount == params->work_end_ckpt_count) {
692            //
693            // If total work items completed equals checkpoint count, create
694            // checkpoint
695            //
696            exitSimLoop("checkpoint");
697        }
698
699        if (params->work_end_exit_count != 0 &&
700            systemWorkEndCount == params->work_end_exit_count) {
701            //
702            // If total work items completed equals exit count, exit simulation
703            //
704            exitSimLoop("work items exit count reached");
705        }
706    }
707}
708
709} // namespace PseudoInst
710