pseudo_inst.cc revision 8666
1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2011 Advanced Micro Devices, Inc. 15 * Copyright (c) 2003-2006 The Regents of The University of Michigan 16 * All rights reserved. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions are 20 * met: redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer; 22 * redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution; 25 * neither the name of the copyright holders nor the names of its 26 * contributors may be used to endorse or promote products derived from 27 * this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * Authors: Nathan Binkert 42 */ 43 44#include <fcntl.h> 45#include <unistd.h> 46 47#include <cerrno> 48#include <fstream> 49#include <string> 50 51#include "arch/vtophys.hh" 52#include "base/debug.hh" 53#include "config/full_system.hh" 54#include "config/the_isa.hh" 55#include "cpu/base.hh" 56#include "cpu/quiesce_event.hh" 57#include "cpu/thread_context.hh" 58#include "debug/Loader.hh" 59#include "debug/Quiesce.hh" 60#include "debug/WorkItems.hh" 61#include "params/BaseCPU.hh" 62#include "sim/pseudo_inst.hh" 63#include "sim/serialize.hh" 64#include "sim/sim_events.hh" 65#include "sim/sim_exit.hh" 66#include "sim/stat_control.hh" 67#include "sim/stats.hh" 68#include "sim/system.hh" 69 70#if FULL_SYSTEM 71#include "arch/kernel_stats.hh" 72#include "sim/vptr.hh" 73#endif 74 75using namespace std; 76 77using namespace Stats; 78using namespace TheISA; 79 80namespace PseudoInst { 81 82#if FULL_SYSTEM 83 84void 85arm(ThreadContext *tc) 86{ 87 if (tc->getKernelStats()) 88 tc->getKernelStats()->arm(); 89} 90 91void 92quiesce(ThreadContext *tc) 93{ 94 if (!tc->getCpuPtr()->params()->do_quiesce) 95 return; 96 97 DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name()); 98 99 tc->suspend(); 100 if (tc->getKernelStats()) 101 tc->getKernelStats()->quiesce(); 102} 103 104void 105quiesceSkip(ThreadContext *tc) 106{ 107 BaseCPU *cpu = tc->getCpuPtr(); 108 109 if (!cpu->params()->do_quiesce) 110 return; 111 112 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 113 114 Tick resume = curTick() + 1; 115 116 cpu->reschedule(quiesceEvent, resume, true); 117 118 DPRINTF(Quiesce, "%s: quiesceSkip() until %d\n", 119 cpu->name(), resume); 120 121 tc->suspend(); 122 if (tc->getKernelStats()) 123 tc->getKernelStats()->quiesce(); 124} 125 126void 127quiesceNs(ThreadContext *tc, uint64_t ns) 128{ 129 BaseCPU *cpu = tc->getCpuPtr(); 130 131 if (!cpu->params()->do_quiesce || ns == 0) 132 return; 133 134 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 135 136 Tick resume = curTick() + SimClock::Int::ns * ns; 137 138 cpu->reschedule(quiesceEvent, resume, true); 139 140 DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n", 141 cpu->name(), ns, resume); 142 143 tc->suspend(); 144 if (tc->getKernelStats()) 145 tc->getKernelStats()->quiesce(); 146} 147 148void 149quiesceCycles(ThreadContext *tc, uint64_t cycles) 150{ 151 BaseCPU *cpu = tc->getCpuPtr(); 152 153 if (!cpu->params()->do_quiesce || cycles == 0) 154 return; 155 156 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 157 158 Tick resume = curTick() + cpu->ticks(cycles); 159 160 cpu->reschedule(quiesceEvent, resume, true); 161 162 DPRINTF(Quiesce, "%s: quiesceCycles(%d) until %d\n", 163 cpu->name(), cycles, resume); 164 165 tc->suspend(); 166 if (tc->getKernelStats()) 167 tc->getKernelStats()->quiesce(); 168} 169 170uint64_t 171quiesceTime(ThreadContext *tc) 172{ 173 return (tc->readLastActivate() - tc->readLastSuspend()) / 174 SimClock::Int::ns; 175} 176 177#endif 178 179uint64_t 180rpns(ThreadContext *tc) 181{ 182 return curTick() / SimClock::Int::ns; 183} 184 185void 186wakeCPU(ThreadContext *tc, uint64_t cpuid) 187{ 188 System *sys = tc->getSystemPtr(); 189 ThreadContext *other_tc = sys->threadContexts[cpuid]; 190 if (other_tc->status() == ThreadContext::Suspended) 191 other_tc->activate(); 192} 193 194void 195m5exit(ThreadContext *tc, Tick delay) 196{ 197 Tick when = curTick() + delay * SimClock::Int::ns; 198 exitSimLoop("m5_exit instruction encountered", 0, when); 199} 200 201#if FULL_SYSTEM 202 203void 204loadsymbol(ThreadContext *tc) 205{ 206 const string &filename = tc->getCpuPtr()->system->params()->symbolfile; 207 if (filename.empty()) { 208 return; 209 } 210 211 std::string buffer; 212 ifstream file(filename.c_str()); 213 214 if (!file) 215 fatal("file error: Can't open symbol table file %s\n", filename); 216 217 while (!file.eof()) { 218 getline(file, buffer); 219 220 if (buffer.empty()) 221 continue; 222 223 string::size_type idx = buffer.find(' '); 224 if (idx == string::npos) 225 continue; 226 227 string address = "0x" + buffer.substr(0, idx); 228 eat_white(address); 229 if (address.empty()) 230 continue; 231 232 // Skip over letter and space 233 string symbol = buffer.substr(idx + 3); 234 eat_white(symbol); 235 if (symbol.empty()) 236 continue; 237 238 Addr addr; 239 if (!to_number(address, addr)) 240 continue; 241 242 if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol)) 243 continue; 244 245 246 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 247 } 248 file.close(); 249} 250 251void 252addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr) 253{ 254 char symb[100]; 255 CopyStringOut(tc, symb, symbolAddr, 100); 256 std::string symbol(symb); 257 258 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 259 260 tc->getSystemPtr()->kernelSymtab->insert(addr,symbol); 261 debugSymbolTable->insert(addr,symbol); 262} 263 264uint64_t 265initParam(ThreadContext *tc) 266{ 267 return tc->getCpuPtr()->system->init_param; 268} 269 270#endif 271 272 273void 274resetstats(ThreadContext *tc, Tick delay, Tick period) 275{ 276 if (!tc->getCpuPtr()->params()->do_statistics_insts) 277 return; 278 279 280 Tick when = curTick() + delay * SimClock::Int::ns; 281 Tick repeat = period * SimClock::Int::ns; 282 283 Stats::schedStatEvent(false, true, when, repeat); 284} 285 286void 287dumpstats(ThreadContext *tc, Tick delay, Tick period) 288{ 289 if (!tc->getCpuPtr()->params()->do_statistics_insts) 290 return; 291 292 293 Tick when = curTick() + delay * SimClock::Int::ns; 294 Tick repeat = period * SimClock::Int::ns; 295 296 Stats::schedStatEvent(true, false, when, repeat); 297} 298 299void 300dumpresetstats(ThreadContext *tc, Tick delay, Tick period) 301{ 302 if (!tc->getCpuPtr()->params()->do_statistics_insts) 303 return; 304 305 306 Tick when = curTick() + delay * SimClock::Int::ns; 307 Tick repeat = period * SimClock::Int::ns; 308 309 Stats::schedStatEvent(true, true, when, repeat); 310} 311 312void 313m5checkpoint(ThreadContext *tc, Tick delay, Tick period) 314{ 315 if (!tc->getCpuPtr()->params()->do_checkpoint_insts) 316 return; 317 318 Tick when = curTick() + delay * SimClock::Int::ns; 319 Tick repeat = period * SimClock::Int::ns; 320 321 exitSimLoop("checkpoint", 0, when, repeat); 322} 323 324#if FULL_SYSTEM 325 326uint64_t 327readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset) 328{ 329 const string &file = tc->getSystemPtr()->params()->readfile; 330 if (file.empty()) { 331 return ULL(0); 332 } 333 334 uint64_t result = 0; 335 336 int fd = ::open(file.c_str(), O_RDONLY, 0); 337 if (fd < 0) 338 panic("could not open file %s\n", file); 339 340 if (::lseek(fd, offset, SEEK_SET) < 0) 341 panic("could not seek: %s", strerror(errno)); 342 343 char *buf = new char[len]; 344 char *p = buf; 345 while (len > 0) { 346 int bytes = ::read(fd, p, len); 347 if (bytes <= 0) 348 break; 349 350 p += bytes; 351 result += bytes; 352 len -= bytes; 353 } 354 355 close(fd); 356 CopyIn(tc, vaddr, buf, result); 357 delete [] buf; 358 return result; 359} 360 361#endif 362 363void 364debugbreak(ThreadContext *tc) 365{ 366 Debug::breakpoint(); 367} 368 369void 370switchcpu(ThreadContext *tc) 371{ 372 exitSimLoop("switchcpu"); 373} 374 375// 376// This function is executed when annotated work items begin. Depending on 377// what the user specified at the command line, the simulation may exit and/or 378// take a checkpoint when a certain work item begins. 379// 380void 381workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid) 382{ 383 tc->getCpuPtr()->workItemBegin(); 384 System *sys = tc->getSystemPtr(); 385 const System::Params *params = sys->params(); 386 sys->workItemBegin(threadid, workid); 387 388 DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid, 389 threadid); 390 391 // 392 // If specified, determine if this is the specific work item the user 393 // identified 394 // 395 if (params->work_item_id == -1 || params->work_item_id == workid) { 396 397 uint64_t systemWorkBeginCount = sys->incWorkItemsBegin(); 398 int cpuId = tc->getCpuPtr()->cpuId(); 399 400 if (params->work_cpus_ckpt_count != 0 && 401 sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) { 402 // 403 // If active cpus equals checkpoint count, create checkpoint 404 // 405 exitSimLoop("checkpoint"); 406 } 407 408 if (systemWorkBeginCount == params->work_begin_ckpt_count) { 409 // 410 // Note: the string specified as the cause of the exit event must 411 // exactly equal "checkpoint" inorder to create a checkpoint 412 // 413 exitSimLoop("checkpoint"); 414 } 415 416 if (systemWorkBeginCount == params->work_begin_exit_count) { 417 // 418 // If a certain number of work items started, exit simulation 419 // 420 exitSimLoop("work started count reach"); 421 } 422 423 if (cpuId == params->work_begin_cpu_id_exit) { 424 // 425 // If work started on the cpu id specified, exit simulation 426 // 427 exitSimLoop("work started on specific cpu"); 428 } 429 } 430} 431 432// 433// This function is executed when annotated work items end. Depending on 434// what the user specified at the command line, the simulation may exit and/or 435// take a checkpoint when a certain work item ends. 436// 437void 438workend(ThreadContext *tc, uint64_t workid, uint64_t threadid) 439{ 440 tc->getCpuPtr()->workItemEnd(); 441 System *sys = tc->getSystemPtr(); 442 const System::Params *params = sys->params(); 443 sys->workItemEnd(threadid, workid); 444 445 DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid); 446 447 // 448 // If specified, determine if this is the specific work item the user 449 // identified 450 // 451 if (params->work_item_id == -1 || params->work_item_id == workid) { 452 453 uint64_t systemWorkEndCount = sys->incWorkItemsEnd(); 454 int cpuId = tc->getCpuPtr()->cpuId(); 455 456 if (params->work_cpus_ckpt_count != 0 && 457 sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) { 458 // 459 // If active cpus equals checkpoint count, create checkpoint 460 // 461 exitSimLoop("checkpoint"); 462 } 463 464 if (params->work_end_ckpt_count != 0 && 465 systemWorkEndCount == params->work_end_ckpt_count) { 466 // 467 // If total work items completed equals checkpoint count, create 468 // checkpoint 469 // 470 exitSimLoop("checkpoint"); 471 } 472 473 if (params->work_end_exit_count != 0 && 474 systemWorkEndCount == params->work_end_exit_count) { 475 // 476 // If total work items completed equals exit count, exit simulation 477 // 478 exitSimLoop("work items exit count reached"); 479 } 480 } 481} 482 483} // namespace PseudoInst 484