pseudo_inst.cc revision 8555
1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2003-2006 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Nathan Binkert 41 */ 42 43#include <fcntl.h> 44#include <unistd.h> 45 46#include <cerrno> 47#include <fstream> 48#include <string> 49 50#include "arch/vtophys.hh" 51#include "base/debug.hh" 52#include "config/full_system.hh" 53#include "config/the_isa.hh" 54#include "cpu/base.hh" 55#include "cpu/quiesce_event.hh" 56#include "cpu/thread_context.hh" 57#include "debug/Loader.hh" 58#include "debug/Quiesce.hh" 59#include "debug/WorkItems.hh" 60#include "params/BaseCPU.hh" 61#include "sim/pseudo_inst.hh" 62#include "sim/serialize.hh" 63#include "sim/sim_events.hh" 64#include "sim/sim_exit.hh" 65#include "sim/stat_control.hh" 66#include "sim/stats.hh" 67#include "sim/system.hh" 68 69#if FULL_SYSTEM 70#include "arch/kernel_stats.hh" 71#include "sim/vptr.hh" 72#endif 73 74using namespace std; 75 76using namespace Stats; 77using namespace TheISA; 78 79namespace PseudoInst { 80 81#if FULL_SYSTEM 82 83void 84arm(ThreadContext *tc) 85{ 86 if (tc->getKernelStats()) 87 tc->getKernelStats()->arm(); 88} 89 90void 91quiesce(ThreadContext *tc) 92{ 93 if (!tc->getCpuPtr()->params()->do_quiesce) 94 return; 95 96 DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name()); 97 98 tc->suspend(); 99 if (tc->getKernelStats()) 100 tc->getKernelStats()->quiesce(); 101} 102 103void 104quiesceSkip(ThreadContext *tc) 105{ 106 BaseCPU *cpu = tc->getCpuPtr(); 107 108 if (!cpu->params()->do_quiesce) 109 return; 110 111 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 112 113 Tick resume = curTick() + 1; 114 115 cpu->reschedule(quiesceEvent, resume, true); 116 117 DPRINTF(Quiesce, "%s: quiesceSkip() until %d\n", 118 cpu->name(), resume); 119 120 tc->suspend(); 121 if (tc->getKernelStats()) 122 tc->getKernelStats()->quiesce(); 123} 124 125void 126quiesceNs(ThreadContext *tc, uint64_t ns) 127{ 128 BaseCPU *cpu = tc->getCpuPtr(); 129 130 if (!cpu->params()->do_quiesce || ns == 0) 131 return; 132 133 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 134 135 Tick resume = curTick() + SimClock::Int::ns * ns; 136 137 cpu->reschedule(quiesceEvent, resume, true); 138 139 DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n", 140 cpu->name(), ns, resume); 141 142 tc->suspend(); 143 if (tc->getKernelStats()) 144 tc->getKernelStats()->quiesce(); 145} 146 147void 148quiesceCycles(ThreadContext *tc, uint64_t cycles) 149{ 150 BaseCPU *cpu = tc->getCpuPtr(); 151 152 if (!cpu->params()->do_quiesce || cycles == 0) 153 return; 154 155 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 156 157 Tick resume = curTick() + cpu->ticks(cycles); 158 159 cpu->reschedule(quiesceEvent, resume, true); 160 161 DPRINTF(Quiesce, "%s: quiesceCycles(%d) until %d\n", 162 cpu->name(), cycles, resume); 163 164 tc->suspend(); 165 if (tc->getKernelStats()) 166 tc->getKernelStats()->quiesce(); 167} 168 169uint64_t 170quiesceTime(ThreadContext *tc) 171{ 172 return (tc->readLastActivate() - tc->readLastSuspend()) / 173 SimClock::Int::ns; 174} 175 176#endif 177 178uint64_t 179rpns(ThreadContext *tc) 180{ 181 return curTick() / SimClock::Int::ns; 182} 183 184void 185wakeCPU(ThreadContext *tc, uint64_t cpuid) 186{ 187 System *sys = tc->getSystemPtr(); 188 ThreadContext *other_tc = sys->threadContexts[cpuid]; 189 if (other_tc->status() == ThreadContext::Suspended) 190 other_tc->activate(); 191} 192 193void 194m5exit(ThreadContext *tc, Tick delay) 195{ 196 Tick when = curTick() + delay * SimClock::Int::ns; 197 exitSimLoop("m5_exit instruction encountered", 0, when); 198} 199 200#if FULL_SYSTEM 201 202void 203loadsymbol(ThreadContext *tc) 204{ 205 const string &filename = tc->getCpuPtr()->system->params()->symbolfile; 206 if (filename.empty()) { 207 return; 208 } 209 210 std::string buffer; 211 ifstream file(filename.c_str()); 212 213 if (!file) 214 fatal("file error: Can't open symbol table file %s\n", filename); 215 216 while (!file.eof()) { 217 getline(file, buffer); 218 219 if (buffer.empty()) 220 continue; 221 222 string::size_type idx = buffer.find(' '); 223 if (idx == string::npos) 224 continue; 225 226 string address = "0x" + buffer.substr(0, idx); 227 eat_white(address); 228 if (address.empty()) 229 continue; 230 231 // Skip over letter and space 232 string symbol = buffer.substr(idx + 3); 233 eat_white(symbol); 234 if (symbol.empty()) 235 continue; 236 237 Addr addr; 238 if (!to_number(address, addr)) 239 continue; 240 241 if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol)) 242 continue; 243 244 245 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 246 } 247 file.close(); 248} 249 250void 251addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr) 252{ 253 char symb[100]; 254 CopyStringOut(tc, symb, symbolAddr, 100); 255 std::string symbol(symb); 256 257 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 258 259 tc->getSystemPtr()->kernelSymtab->insert(addr,symbol); 260 debugSymbolTable->insert(addr,symbol); 261} 262 263uint64_t 264initParam(ThreadContext *tc) 265{ 266 return tc->getCpuPtr()->system->init_param; 267} 268 269#endif 270 271 272void 273resetstats(ThreadContext *tc, Tick delay, Tick period) 274{ 275 if (!tc->getCpuPtr()->params()->do_statistics_insts) 276 return; 277 278 279 Tick when = curTick() + delay * SimClock::Int::ns; 280 Tick repeat = period * SimClock::Int::ns; 281 282 Stats::schedStatEvent(false, true, when, repeat); 283} 284 285void 286dumpstats(ThreadContext *tc, Tick delay, Tick period) 287{ 288 if (!tc->getCpuPtr()->params()->do_statistics_insts) 289 return; 290 291 292 Tick when = curTick() + delay * SimClock::Int::ns; 293 Tick repeat = period * SimClock::Int::ns; 294 295 Stats::schedStatEvent(true, false, when, repeat); 296} 297 298void 299dumpresetstats(ThreadContext *tc, Tick delay, Tick period) 300{ 301 if (!tc->getCpuPtr()->params()->do_statistics_insts) 302 return; 303 304 305 Tick when = curTick() + delay * SimClock::Int::ns; 306 Tick repeat = period * SimClock::Int::ns; 307 308 Stats::schedStatEvent(true, true, when, repeat); 309} 310 311void 312m5checkpoint(ThreadContext *tc, Tick delay, Tick period) 313{ 314 if (!tc->getCpuPtr()->params()->do_checkpoint_insts) 315 return; 316 317 Tick when = curTick() + delay * SimClock::Int::ns; 318 Tick repeat = period * SimClock::Int::ns; 319 320 exitSimLoop("checkpoint", 0, when, repeat); 321} 322 323#if FULL_SYSTEM 324 325uint64_t 326readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset) 327{ 328 const string &file = tc->getSystemPtr()->params()->readfile; 329 if (file.empty()) { 330 return ULL(0); 331 } 332 333 uint64_t result = 0; 334 335 int fd = ::open(file.c_str(), O_RDONLY, 0); 336 if (fd < 0) 337 panic("could not open file %s\n", file); 338 339 if (::lseek(fd, offset, SEEK_SET) < 0) 340 panic("could not seek: %s", strerror(errno)); 341 342 char *buf = new char[len]; 343 char *p = buf; 344 while (len > 0) { 345 int bytes = ::read(fd, p, len); 346 if (bytes <= 0) 347 break; 348 349 p += bytes; 350 result += bytes; 351 len -= bytes; 352 } 353 354 close(fd); 355 CopyIn(tc, vaddr, buf, result); 356 delete [] buf; 357 return result; 358} 359 360#endif 361 362void 363debugbreak(ThreadContext *tc) 364{ 365 Debug::breakpoint(); 366} 367 368void 369switchcpu(ThreadContext *tc) 370{ 371 exitSimLoop("switchcpu"); 372} 373 374// 375// This function is executed when annotated work items begin. Depending on 376// what the user specified at the command line, the simulation may exit and/or 377// take a checkpoint when a certain work item begins. 378// 379void 380workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid) 381{ 382 tc->getCpuPtr()->workItemBegin(); 383 System *sys = tc->getSystemPtr(); 384 385 DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid, 386 threadid); 387 388 // 389 // If specified, determine if this is the specific work item the user 390 // identified 391 // 392 if (sys->params()->work_item_id == -1 || 393 sys->params()->work_item_id == workid) { 394 395 uint64_t systemWorkBeginCount = sys->incWorkItemsBegin(); 396 int cpuId = tc->getCpuPtr()->cpuId(); 397 398 if (sys->params()->work_cpus_ckpt_count != 0 && 399 sys->markWorkItem(cpuId) >= sys->params()->work_cpus_ckpt_count) { 400 // 401 // If active cpus equals checkpoint count, create checkpoint 402 // 403 Event *event = new SimLoopExitEvent("checkpoint", 0); 404 mainEventQueue.schedule(event, curTick()); 405 } 406 407 if (systemWorkBeginCount == sys->params()->work_begin_ckpt_count) { 408 // 409 // Note: the string specified as the cause of the exit event must 410 // exactly equal "checkpoint" inorder to create a checkpoint 411 // 412 Event *event = new SimLoopExitEvent("checkpoint", 0); 413 mainEventQueue.schedule(event, curTick()); 414 } 415 416 if (systemWorkBeginCount == sys->params()->work_begin_exit_count) { 417 // 418 // If a certain number of work items started, exit simulation 419 // 420 Event *event = new SimLoopExitEvent("work started count reach", 0); 421 mainEventQueue.schedule(event, curTick()); 422 } 423 424 if (tc->getCpuPtr()->cpuId() == sys->params()->work_begin_cpu_id_exit) { 425 // 426 // If work started on the specific cpu id specified, exit simulation 427 // 428 Event *event = new SimLoopExitEvent("work started on specific cpu", 429 0); 430 431 mainEventQueue.schedule(event, curTick() + 1); 432 } 433 } 434} 435 436// 437// This function is executed when annotated work items end. Depending on 438// what the user specified at the command line, the simulation may exit and/or 439// take a checkpoint when a certain work item ends. 440// 441void 442workend(ThreadContext *tc, uint64_t workid, uint64_t threadid) 443{ 444 tc->getCpuPtr()->workItemEnd(); 445 System *sys = tc->getSystemPtr(); 446 447 DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid); 448 449 // 450 // If specified, determine if this is the specific work item the user 451 // identified 452 // 453 if (sys->params()->work_item_id == -1 || 454 sys->params()->work_item_id == workid) { 455 456 uint64_t systemWorkEndCount = sys->incWorkItemsEnd(); 457 int cpuId = tc->getCpuPtr()->cpuId(); 458 459 if (sys->params()->work_cpus_ckpt_count != 0 && 460 sys->markWorkItem(cpuId) >= sys->params()->work_cpus_ckpt_count) { 461 // 462 // If active cpus equals checkpoint count, create checkpoint 463 // 464 Event *event = new SimLoopExitEvent("checkpoint", 0); 465 mainEventQueue.schedule(event, curTick()); 466 } 467 468 if (sys->params()->work_end_ckpt_count != 0 && 469 systemWorkEndCount == sys->params()->work_end_ckpt_count) { 470 // 471 // If total work items completed equals checkpoint count, create 472 // checkpoint 473 // 474 Event *event = new SimLoopExitEvent("checkpoint", 0); 475 mainEventQueue.schedule(event, curTick()); 476 } 477 478 if (sys->params()->work_end_exit_count != 0 && 479 systemWorkEndCount == sys->params()->work_end_exit_count) { 480 // 481 // If total work items completed equals exit count, exit simulation 482 // 483 Event *event = new SimLoopExitEvent("work items exit count reached", 484 0); 485 486 mainEventQueue.schedule(event, curTick()); 487 } 488 } 489} 490 491} // namespace PseudoInst 492