pseudo_inst.cc revision 8142
1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2003-2006 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Nathan Binkert 41 */ 42 43#include <errno.h> 44#include <fcntl.h> 45#include <unistd.h> 46 47#include <fstream> 48#include <string> 49 50#include "arch/vtophys.hh" 51#include "base/debug.hh" 52#include "config/full_system.hh" 53#include "config/the_isa.hh" 54#include "cpu/base.hh" 55#include "cpu/thread_context.hh" 56#include "cpu/quiesce_event.hh" 57#include "params/BaseCPU.hh" 58#include "sim/pseudo_inst.hh" 59#include "sim/serialize.hh" 60#include "sim/sim_events.hh" 61#include "sim/sim_exit.hh" 62#include "sim/stat_control.hh" 63#include "sim/stats.hh" 64#include "sim/system.hh" 65 66#if FULL_SYSTEM 67#include "arch/kernel_stats.hh" 68#include "sim/vptr.hh" 69#endif 70 71using namespace std; 72 73using namespace Stats; 74using namespace TheISA; 75 76namespace PseudoInst { 77 78#if FULL_SYSTEM 79 80void 81arm(ThreadContext *tc) 82{ 83 if (tc->getKernelStats()) 84 tc->getKernelStats()->arm(); 85} 86 87void 88quiesce(ThreadContext *tc) 89{ 90 if (!tc->getCpuPtr()->params()->do_quiesce) 91 return; 92 93 DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name()); 94 95 tc->suspend(); 96 if (tc->getKernelStats()) 97 tc->getKernelStats()->quiesce(); 98} 99 100void 101quiesceSkip(ThreadContext *tc) 102{ 103 BaseCPU *cpu = tc->getCpuPtr(); 104 105 if (!cpu->params()->do_quiesce) 106 return; 107 108 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 109 110 Tick resume = curTick() + 1; 111 112 cpu->reschedule(quiesceEvent, resume, true); 113 114 DPRINTF(Quiesce, "%s: quiesceSkip() until %d\n", 115 cpu->name(), resume); 116 117 tc->suspend(); 118 if (tc->getKernelStats()) 119 tc->getKernelStats()->quiesce(); 120} 121 122void 123quiesceNs(ThreadContext *tc, uint64_t ns) 124{ 125 BaseCPU *cpu = tc->getCpuPtr(); 126 127 if (!cpu->params()->do_quiesce || ns == 0) 128 return; 129 130 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 131 132 Tick resume = curTick() + SimClock::Int::ns * ns; 133 134 cpu->reschedule(quiesceEvent, resume, true); 135 136 DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n", 137 cpu->name(), ns, resume); 138 139 tc->suspend(); 140 if (tc->getKernelStats()) 141 tc->getKernelStats()->quiesce(); 142} 143 144void 145quiesceCycles(ThreadContext *tc, uint64_t cycles) 146{ 147 BaseCPU *cpu = tc->getCpuPtr(); 148 149 if (!cpu->params()->do_quiesce || cycles == 0) 150 return; 151 152 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 153 154 Tick resume = curTick() + cpu->ticks(cycles); 155 156 cpu->reschedule(quiesceEvent, resume, true); 157 158 DPRINTF(Quiesce, "%s: quiesceCycles(%d) until %d\n", 159 cpu->name(), cycles, resume); 160 161 tc->suspend(); 162 if (tc->getKernelStats()) 163 tc->getKernelStats()->quiesce(); 164} 165 166uint64_t 167quiesceTime(ThreadContext *tc) 168{ 169 return (tc->readLastActivate() - tc->readLastSuspend()) / 170 SimClock::Int::ns; 171} 172 173#endif 174 175uint64_t 176rpns(ThreadContext *tc) 177{ 178 return curTick() / SimClock::Int::ns; 179} 180 181void 182wakeCPU(ThreadContext *tc, uint64_t cpuid) 183{ 184 System *sys = tc->getSystemPtr(); 185 ThreadContext *other_tc = sys->threadContexts[cpuid]; 186 if (other_tc->status() == ThreadContext::Suspended) 187 other_tc->activate(); 188} 189 190void 191m5exit(ThreadContext *tc, Tick delay) 192{ 193 Tick when = curTick() + delay * SimClock::Int::ns; 194 exitSimLoop("m5_exit instruction encountered", 0, when); 195} 196 197#if FULL_SYSTEM 198 199void 200loadsymbol(ThreadContext *tc) 201{ 202 const string &filename = tc->getCpuPtr()->system->params()->symbolfile; 203 if (filename.empty()) { 204 return; 205 } 206 207 std::string buffer; 208 ifstream file(filename.c_str()); 209 210 if (!file) 211 fatal("file error: Can't open symbol table file %s\n", filename); 212 213 while (!file.eof()) { 214 getline(file, buffer); 215 216 if (buffer.empty()) 217 continue; 218 219 string::size_type idx = buffer.find(' '); 220 if (idx == string::npos) 221 continue; 222 223 string address = "0x" + buffer.substr(0, idx); 224 eat_white(address); 225 if (address.empty()) 226 continue; 227 228 // Skip over letter and space 229 string symbol = buffer.substr(idx + 3); 230 eat_white(symbol); 231 if (symbol.empty()) 232 continue; 233 234 Addr addr; 235 if (!to_number(address, addr)) 236 continue; 237 238 if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol)) 239 continue; 240 241 242 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 243 } 244 file.close(); 245} 246 247void 248addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr) 249{ 250 char symb[100]; 251 CopyStringOut(tc, symb, symbolAddr, 100); 252 std::string symbol(symb); 253 254 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 255 256 tc->getSystemPtr()->kernelSymtab->insert(addr,symbol); 257 debugSymbolTable->insert(addr,symbol); 258} 259 260#endif 261 262 263void 264resetstats(ThreadContext *tc, Tick delay, Tick period) 265{ 266 if (!tc->getCpuPtr()->params()->do_statistics_insts) 267 return; 268 269 270 Tick when = curTick() + delay * SimClock::Int::ns; 271 Tick repeat = period * SimClock::Int::ns; 272 273 Stats::schedStatEvent(false, true, when, repeat); 274} 275 276void 277dumpstats(ThreadContext *tc, Tick delay, Tick period) 278{ 279 if (!tc->getCpuPtr()->params()->do_statistics_insts) 280 return; 281 282 283 Tick when = curTick() + delay * SimClock::Int::ns; 284 Tick repeat = period * SimClock::Int::ns; 285 286 Stats::schedStatEvent(true, false, when, repeat); 287} 288 289void 290dumpresetstats(ThreadContext *tc, Tick delay, Tick period) 291{ 292 if (!tc->getCpuPtr()->params()->do_statistics_insts) 293 return; 294 295 296 Tick when = curTick() + delay * SimClock::Int::ns; 297 Tick repeat = period * SimClock::Int::ns; 298 299 Stats::schedStatEvent(true, true, when, repeat); 300} 301 302void 303m5checkpoint(ThreadContext *tc, Tick delay, Tick period) 304{ 305 if (!tc->getCpuPtr()->params()->do_checkpoint_insts) 306 return; 307 308 Tick when = curTick() + delay * SimClock::Int::ns; 309 Tick repeat = period * SimClock::Int::ns; 310 311 exitSimLoop("checkpoint", 0, when, repeat); 312} 313 314#if FULL_SYSTEM 315 316uint64_t 317readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset) 318{ 319 const string &file = tc->getSystemPtr()->params()->readfile; 320 if (file.empty()) { 321 return ULL(0); 322 } 323 324 uint64_t result = 0; 325 326 int fd = ::open(file.c_str(), O_RDONLY, 0); 327 if (fd < 0) 328 panic("could not open file %s\n", file); 329 330 if (::lseek(fd, offset, SEEK_SET) < 0) 331 panic("could not seek: %s", strerror(errno)); 332 333 char *buf = new char[len]; 334 char *p = buf; 335 while (len > 0) { 336 int bytes = ::read(fd, p, len); 337 if (bytes <= 0) 338 break; 339 340 p += bytes; 341 result += bytes; 342 len -= bytes; 343 } 344 345 close(fd); 346 CopyIn(tc, vaddr, buf, result); 347 delete [] buf; 348 return result; 349} 350 351#endif 352 353void 354debugbreak(ThreadContext *tc) 355{ 356 debug_break(); 357} 358 359void 360switchcpu(ThreadContext *tc) 361{ 362 exitSimLoop("switchcpu"); 363} 364 365// 366// This function is executed when annotated work items begin. Depending on 367// what the user specified at the command line, the simulation may exit and/or 368// take a checkpoint when a certain work item begins. 369// 370void 371workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid) 372{ 373 tc->getCpuPtr()->workItemBegin(); 374 System *sys = tc->getSystemPtr(); 375 376 DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid, 377 threadid); 378 379 // 380 // If specified, determine if this is the specific work item the user 381 // identified 382 // 383 if (sys->params()->work_item_id == -1 || 384 sys->params()->work_item_id == workid) { 385 386 uint64_t systemWorkBeginCount = sys->incWorkItemsBegin(); 387 int cpuId = tc->getCpuPtr()->cpuId(); 388 389 if (sys->params()->work_cpus_ckpt_count != 0 && 390 sys->markWorkItem(cpuId) >= sys->params()->work_cpus_ckpt_count) { 391 // 392 // If active cpus equals checkpoint count, create checkpoint 393 // 394 Event *event = new SimLoopExitEvent("checkpoint", 0); 395 mainEventQueue.schedule(event, curTick()); 396 } 397 398 if (systemWorkBeginCount == sys->params()->work_begin_ckpt_count) { 399 // 400 // Note: the string specified as the cause of the exit event must 401 // exactly equal "checkpoint" inorder to create a checkpoint 402 // 403 Event *event = new SimLoopExitEvent("checkpoint", 0); 404 mainEventQueue.schedule(event, curTick()); 405 } 406 407 if (systemWorkBeginCount == sys->params()->work_begin_exit_count) { 408 // 409 // If a certain number of work items started, exit simulation 410 // 411 Event *event = new SimLoopExitEvent("work started count reach", 0); 412 mainEventQueue.schedule(event, curTick()); 413 } 414 415 if (tc->getCpuPtr()->cpuId() == sys->params()->work_begin_cpu_id_exit) { 416 // 417 // If work started on the specific cpu id specified, exit simulation 418 // 419 Event *event = new SimLoopExitEvent("work started on specific cpu", 420 0); 421 422 mainEventQueue.schedule(event, curTick() + 1); 423 } 424 } 425} 426 427// 428// This function is executed when annotated work items end. Depending on 429// what the user specified at the command line, the simulation may exit and/or 430// take a checkpoint when a certain work item ends. 431// 432void 433workend(ThreadContext *tc, uint64_t workid, uint64_t threadid) 434{ 435 tc->getCpuPtr()->workItemEnd(); 436 System *sys = tc->getSystemPtr(); 437 438 DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid); 439 440 // 441 // If specified, determine if this is the specific work item the user 442 // identified 443 // 444 if (sys->params()->work_item_id == -1 || 445 sys->params()->work_item_id == workid) { 446 447 uint64_t systemWorkEndCount = sys->incWorkItemsEnd(); 448 int cpuId = tc->getCpuPtr()->cpuId(); 449 450 if (sys->params()->work_cpus_ckpt_count != 0 && 451 sys->markWorkItem(cpuId) >= sys->params()->work_cpus_ckpt_count) { 452 // 453 // If active cpus equals checkpoint count, create checkpoint 454 // 455 Event *event = new SimLoopExitEvent("checkpoint", 0); 456 mainEventQueue.schedule(event, curTick()); 457 } 458 459 if (sys->params()->work_end_ckpt_count != 0 && 460 systemWorkEndCount == sys->params()->work_end_ckpt_count) { 461 // 462 // If total work items completed equals checkpoint count, create 463 // checkpoint 464 // 465 Event *event = new SimLoopExitEvent("checkpoint", 0); 466 mainEventQueue.schedule(event, curTick()); 467 } 468 469 if (sys->params()->work_end_exit_count != 0 && 470 systemWorkEndCount == sys->params()->work_end_exit_count) { 471 // 472 // If total work items completed equals exit count, exit simulation 473 // 474 Event *event = new SimLoopExitEvent("work items exit count reached", 475 0); 476 477 mainEventQueue.schedule(event, curTick()); 478 } 479 } 480} 481 482} // namespace PseudoInst 483