pseudo_inst.cc revision 2680
1/* 2 * Copyright (c) 2003-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Nathan Binkert 29 */ 30 31#include <errno.h> 32#include <fcntl.h> 33#include <unistd.h> 34 35#include <string> 36 37#include "sim/pseudo_inst.hh" 38#include "arch/vtophys.hh" 39#include "cpu/base.hh" 40#include "cpu/sampler/sampler.hh" 41#include "cpu/thread_context.hh" 42#include "cpu/quiesce_event.hh" 43#include "kern/kernel_stats.hh" 44#include "sim/param.hh" 45#include "sim/serialize.hh" 46#include "sim/sim_exit.hh" 47#include "sim/stat_control.hh" 48#include "sim/stats.hh" 49#include "sim/system.hh" 50#include "sim/debug.hh" 51#include "sim/vptr.hh" 52 53using namespace std; 54 55extern Sampler *SampCPU; 56 57using namespace Stats; 58using namespace TheISA; 59 60namespace AlphaPseudo 61{ 62 bool doStatisticsInsts; 63 bool doCheckpointInsts; 64 bool doQuiesce; 65 66 void 67 arm(ThreadContext *tc) 68 { 69 if (tc->getKernelStats()) 70 tc->getKernelStats()->arm(); 71 } 72 73 void 74 quiesce(ThreadContext *tc) 75 { 76 if (!doQuiesce) 77 return; 78 79 tc->suspend(); 80 if (tc->getKernelStats()) 81 tc->getKernelStats()->quiesce(); 82 } 83 84 void 85 quiesceNs(ThreadContext *tc, uint64_t ns) 86 { 87 if (!doQuiesce || ns == 0) 88 return; 89 90 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 91 92 if (quiesceEvent->scheduled()) 93 quiesceEvent->reschedule(curTick + Clock::Int::ns * ns); 94 else 95 quiesceEvent->schedule(curTick + Clock::Int::ns * ns); 96 97 tc->suspend(); 98 if (tc->getKernelStats()) 99 tc->getKernelStats()->quiesce(); 100 } 101 102 void 103 quiesceCycles(ThreadContext *tc, uint64_t cycles) 104 { 105 if (!doQuiesce || cycles == 0) 106 return; 107 108 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 109 110 if (quiesceEvent->scheduled()) 111 quiesceEvent->reschedule(curTick + 112 tc->getCpuPtr()->cycles(cycles)); 113 else 114 quiesceEvent->schedule(curTick + 115 tc->getCpuPtr()->cycles(cycles)); 116 117 tc->suspend(); 118 if (tc->getKernelStats()) 119 tc->getKernelStats()->quiesce(); 120 } 121 122 uint64_t 123 quiesceTime(ThreadContext *tc) 124 { 125 return (tc->readLastActivate() - tc->readLastSuspend()) / Clock::Int::ns; 126 } 127 128 void 129 ivlb(ThreadContext *tc) 130 { 131 if (tc->getKernelStats()) 132 tc->getKernelStats()->ivlb(); 133 } 134 135 void 136 ivle(ThreadContext *tc) 137 { 138 } 139 140 void 141 m5exit_old(ThreadContext *tc) 142 { 143 SimExit(curTick, "m5_exit_old instruction encountered"); 144 } 145 146 void 147 m5exit(ThreadContext *tc, Tick delay) 148 { 149 Tick when = curTick + delay * Clock::Int::ns; 150 SimExit(when, "m5_exit instruction encountered"); 151 } 152 153 void 154 resetstats(ThreadContext *tc, Tick delay, Tick period) 155 { 156 if (!doStatisticsInsts) 157 return; 158 159 160 Tick when = curTick + delay * Clock::Int::ns; 161 Tick repeat = period * Clock::Int::ns; 162 163 using namespace Stats; 164 SetupEvent(Reset, when, repeat); 165 } 166 167 void 168 dumpstats(ThreadContext *tc, Tick delay, Tick period) 169 { 170 if (!doStatisticsInsts) 171 return; 172 173 174 Tick when = curTick + delay * Clock::Int::ns; 175 Tick repeat = period * Clock::Int::ns; 176 177 using namespace Stats; 178 SetupEvent(Dump, when, repeat); 179 } 180 181 void 182 addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr) 183 { 184 char symb[100]; 185 CopyStringOut(tc, symb, symbolAddr, 100); 186 std::string symbol(symb); 187 188 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 189 190 tc->getSystemPtr()->kernelSymtab->insert(addr,symbol); 191 } 192 193 void 194 dumpresetstats(ThreadContext *tc, Tick delay, Tick period) 195 { 196 if (!doStatisticsInsts) 197 return; 198 199 200 Tick when = curTick + delay * Clock::Int::ns; 201 Tick repeat = period * Clock::Int::ns; 202 203 using namespace Stats; 204 SetupEvent(Dump|Reset, when, repeat); 205 } 206 207 void 208 m5checkpoint(ThreadContext *tc, Tick delay, Tick period) 209 { 210 if (!doCheckpointInsts) 211 return; 212 213 214 Tick when = curTick + delay * Clock::Int::ns; 215 Tick repeat = period * Clock::Int::ns; 216 217 Checkpoint::setup(when, repeat); 218 } 219 220 uint64_t 221 readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset) 222 { 223 const string &file = tc->getCpuPtr()->system->params()->readfile; 224 if (file.empty()) { 225 return ULL(0); 226 } 227 228 uint64_t result = 0; 229 230 int fd = ::open(file.c_str(), O_RDONLY, 0); 231 if (fd < 0) 232 panic("could not open file %s\n", file); 233 234 if (::lseek(fd, offset, SEEK_SET) < 0) 235 panic("could not seek: %s", strerror(errno)); 236 237 char *buf = new char[len]; 238 char *p = buf; 239 while (len > 0) { 240 int bytes = ::read(fd, p, len); 241 if (bytes <= 0) 242 break; 243 244 p += bytes; 245 result += bytes; 246 len -= bytes; 247 } 248 249 close(fd); 250 CopyIn(tc, vaddr, buf, result); 251 delete [] buf; 252 return result; 253 } 254 255 class Context : public ParamContext 256 { 257 public: 258 Context(const string §ion) : ParamContext(section) {} 259 void checkParams(); 260 }; 261 262 Context context("pseudo_inst"); 263 264 Param<bool> __quiesce(&context, "quiesce", 265 "enable quiesce instructions", 266 true); 267 Param<bool> __statistics(&context, "statistics", 268 "enable statistics pseudo instructions", 269 true); 270 Param<bool> __checkpoint(&context, "checkpoint", 271 "enable checkpoint pseudo instructions", 272 true); 273 274 void 275 Context::checkParams() 276 { 277 doQuiesce = __quiesce; 278 doStatisticsInsts = __statistics; 279 doCheckpointInsts = __checkpoint; 280 } 281 282 void debugbreak(ThreadContext *tc) 283 { 284 debug_break(); 285 } 286 287 void switchcpu(ThreadContext *tc) 288 { 289 if (SampCPU) 290 SampCPU->switchCPUs(); 291 } 292} 293