pseudo_inst.cc revision 2188 
1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <errno.h>
30#include <fcntl.h>
31#include <unistd.h>
32#include <cstdio>
33
34#include <string>
35
36#include "sim/pseudo_inst.hh"
37#include "targetarch/vtophys.hh"
38#include "cpu/base.hh"
39#include "cpu/sampler/sampler.hh"
40#include "cpu/exec_context.hh"
41#include "kern/kernel_stats.hh"
42#include "sim/param.hh"
43#include "sim/serialize.hh"
44#include "sim/sim_exit.hh"
45#include "sim/stat_control.hh"
46#include "sim/stats.hh"
47#include "sim/system.hh"
48#include "sim/debug.hh"
49#include "sim/vptr.hh"
50
51using namespace std;
52
53extern Sampler *SampCPU;
54
55using namespace Stats;
56using namespace TheISA;
57
58namespace AlphaPseudo
59{
60    bool doStatisticsInsts;
61    bool doCheckpointInsts;
62    bool doQuiesce;
63
64    void
65    arm(ExecContext *xc)
66    {
67        xc->kernelStats->arm();
68    }
69
70    void
71    quiesce(ExecContext *xc)
72    {
73        if (!doQuiesce)
74            return;
75
76        xc->suspend();
77        xc->kernelStats->quiesce();
78    }
79
80    void
81    quiesceNs(ExecContext *xc, uint64_t ns)
82    {
83        if (!doQuiesce || ns == 0)
84            return;
85
86        if (xc->quiesceEvent.scheduled())
87            xc->quiesceEvent.reschedule(curTick + Clock::Int::ns * ns);
88        else
89            xc->quiesceEvent.schedule(curTick + Clock::Int::ns * ns);
90
91        xc->suspend();
92        xc->kernelStats->quiesce();
93    }
94
95    void
96    quiesceCycles(ExecContext *xc, uint64_t cycles)
97    {
98        if (!doQuiesce || cycles == 0)
99            return;
100
101        if (xc->quiesceEvent.scheduled())
102            xc->quiesceEvent.reschedule(curTick + xc->cpu->cycles(cycles));
103        else
104            xc->quiesceEvent.schedule(curTick + xc->cpu->cycles(cycles));
105
106        xc->suspend();
107        xc->kernelStats->quiesce();
108    }
109
110    uint64_t
111    quiesceTime(ExecContext *xc)
112    {
113        return (xc->lastActivate - xc->lastSuspend) / Clock::Int::ns ;
114    }
115
116    void
117    ivlb(ExecContext *xc)
118    {
119        xc->kernelStats->ivlb();
120    }
121
122    void
123    ivle(ExecContext *xc)
124    {
125    }
126
127    void
128    m5exit_old(ExecContext *xc)
129    {
130        SimExit(curTick, "m5_exit_old instruction encountered");
131    }
132
133    void
134    m5exit(ExecContext *xc, Tick delay)
135    {
136        Tick when = curTick + delay * Clock::Int::ns;
137        SimExit(when, "m5_exit instruction encountered");
138    }
139
140    void
141    resetstats(ExecContext *xc, Tick delay, Tick period)
142    {
143        if (!doStatisticsInsts)
144            return;
145
146
147        Tick when = curTick + delay * Clock::Int::ns;
148        Tick repeat = period * Clock::Int::ns;
149
150        using namespace Stats;
151        SetupEvent(Reset, when, repeat);
152    }
153
154    void
155    dumpstats(ExecContext *xc, Tick delay, Tick period)
156    {
157        if (!doStatisticsInsts)
158            return;
159
160
161        Tick when = curTick + delay * Clock::Int::ns;
162        Tick repeat = period * Clock::Int::ns;
163
164        using namespace Stats;
165        SetupEvent(Dump, when, repeat);
166    }
167
168    void
169    addsymbol(ExecContext *xc, Addr addr, Addr symbolAddr)
170    {
171        char symb[100];
172        CopyString(xc, symb, symbolAddr, 100);
173        std::string symbol(symb);
174
175        DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
176
177        xc->system->kernelSymtab->insert(addr,symbol);
178    }
179
180    void
181    dumpresetstats(ExecContext *xc, Tick delay, Tick period)
182    {
183        if (!doStatisticsInsts)
184            return;
185
186
187        Tick when = curTick + delay * Clock::Int::ns;
188        Tick repeat = period * Clock::Int::ns;
189
190        using namespace Stats;
191        SetupEvent(Dump|Reset, when, repeat);
192    }
193
194    void
195    m5checkpoint(ExecContext *xc, Tick delay, Tick period)
196    {
197        if (!doCheckpointInsts)
198            return;
199
200
201        Tick when = curTick + delay * Clock::Int::ns;
202        Tick repeat = period * Clock::Int::ns;
203
204        Checkpoint::setup(when, repeat);
205    }
206
207    uint64_t
208    readfile(ExecContext *xc, Addr vaddr, uint64_t len, uint64_t offset)
209    {
210        const string &file = xc->cpu->system->params->readfile;
211        if (file.empty()) {
212            return ULL(0);
213        }
214
215        uint64_t result = 0;
216
217        int fd = ::open(file.c_str(), O_RDONLY, 0);
218        if (fd < 0)
219            panic("could not open file %s\n", file);
220
221        if (::lseek(fd, offset, SEEK_SET) < 0)
222            panic("could not seek: %s", strerror(errno));
223
224        char *buf = new char[len];
225        char *p = buf;
226        while (len > 0) {
227            int bytes = ::read(fd, p, len);
228            if (bytes <= 0)
229                break;
230
231            p += bytes;
232            result += bytes;
233            len -= bytes;
234        }
235
236        close(fd);
237        CopyIn(xc, vaddr, buf, result);
238        delete [] buf;
239        return result;
240    }
241
242    class Context : public ParamContext
243    {
244      public:
245        Context(const string &section) : ParamContext(section) {}
246        void checkParams();
247    };
248
249    Context context("pseudo_inst");
250
251    Param<bool> __quiesce(&context, "quiesce",
252                          "enable quiesce instructions",
253                          true);
254    Param<bool> __statistics(&context, "statistics",
255                             "enable statistics pseudo instructions",
256                             true);
257    Param<bool> __checkpoint(&context, "checkpoint",
258                             "enable checkpoint pseudo instructions",
259                             true);
260
261    void
262    Context::checkParams()
263    {
264        doQuiesce = __quiesce;
265        doStatisticsInsts = __statistics;
266        doCheckpointInsts = __checkpoint;
267    }
268
269    void debugbreak(ExecContext *xc)
270    {
271        debug_break();
272    }
273
274    void switchcpu(ExecContext *xc)
275    {
276        if (SampCPU)
277            SampCPU->switchCPUs();
278    }
279}
280