pseudo_inst.cc revision 13905 
1/*
2 * Copyright (c) 2010-2012, 2015, 2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2011 Advanced Micro Devices, Inc.
15 * Copyright (c) 2003-2006 The Regents of The University of Michigan
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Nathan Binkert
42 */
43
44#include "sim/pseudo_inst.hh"
45
46#include <fcntl.h>
47#include <unistd.h>
48
49#include <cerrno>
50#include <fstream>
51#include <string>
52#include <vector>
53
54#include <gem5/asm/generic/m5ops.h>
55
56#include "arch/pseudo_inst.hh"
57#include "arch/utility.hh"
58#include "arch/vtophys.hh"
59#include "base/debug.hh"
60#include "base/output.hh"
61#include "config/the_isa.hh"
62#include "cpu/base.hh"
63#include "cpu/quiesce_event.hh"
64#include "cpu/thread_context.hh"
65#include "debug/Loader.hh"
66#include "debug/PseudoInst.hh"
67#include "debug/Quiesce.hh"
68#include "debug/WorkItems.hh"
69#include "dev/net/dist_iface.hh"
70#include "kern/kernel_stats.hh"
71#include "params/BaseCPU.hh"
72#include "sim/full_system.hh"
73#include "sim/initparam_keys.hh"
74#include "sim/process.hh"
75#include "sim/serialize.hh"
76#include "sim/sim_events.hh"
77#include "sim/sim_exit.hh"
78#include "sim/stat_control.hh"
79#include "sim/stats.hh"
80#include "sim/system.hh"
81#include "sim/vptr.hh"
82
83using namespace std;
84
85using namespace Stats;
86using namespace TheISA;
87
88namespace PseudoInst {
89
90static inline void
91panicFsOnlyPseudoInst(const char *name)
92{
93    panic("Pseudo inst \"%s\" is only available in Full System mode.");
94}
95
96uint64_t
97pseudoInst(ThreadContext *tc, uint8_t func, uint8_t subfunc)
98{
99    uint64_t args[4];
100
101    DPRINTF(PseudoInst, "PseudoInst::pseudoInst(%i, %i)\n", func, subfunc);
102
103    // We need to do this in a slightly convoluted way since
104    // getArgument() might have side-effects on arg_num. We could have
105    // used the Argument class, but due to the possible side effects
106    // from getArgument, it'd most likely break.
107    int arg_num(0);
108    for (int i = 0; i < sizeof(args) / sizeof(*args); ++i) {
109        args[arg_num] = getArgument(tc, arg_num, sizeof(uint64_t), false);
110        ++arg_num;
111    }
112
113    switch (func) {
114      case M5OP_ARM:
115        arm(tc);
116        break;
117
118      case M5OP_QUIESCE:
119        quiesce(tc);
120        break;
121
122      case M5OP_QUIESCE_NS:
123        quiesceNs(tc, args[0]);
124        break;
125
126      case M5OP_QUIESCE_CYCLE:
127        quiesceCycles(tc, args[0]);
128        break;
129
130      case M5OP_QUIESCE_TIME:
131        return quiesceTime(tc);
132
133      case M5OP_RPNS:
134        return rpns(tc);
135
136      case M5OP_WAKE_CPU:
137        wakeCPU(tc, args[0]);
138        break;
139
140      case M5OP_EXIT:
141        m5exit(tc, args[0]);
142        break;
143
144      case M5OP_FAIL:
145        m5fail(tc, args[0], args[1]);
146        break;
147
148      case M5OP_INIT_PARAM:
149        return initParam(tc, args[0], args[1]);
150
151      case M5OP_LOAD_SYMBOL:
152        loadsymbol(tc);
153        break;
154
155      case M5OP_RESET_STATS:
156        resetstats(tc, args[0], args[1]);
157        break;
158
159      case M5OP_DUMP_STATS:
160        dumpstats(tc, args[0], args[1]);
161        break;
162
163      case M5OP_DUMP_RESET_STATS:
164        dumpresetstats(tc, args[0], args[1]);
165        break;
166
167      case M5OP_CHECKPOINT:
168        m5checkpoint(tc, args[0], args[1]);
169        break;
170
171      case M5OP_WRITE_FILE:
172        return writefile(tc, args[0], args[1], args[2], args[3]);
173
174      case M5OP_READ_FILE:
175        return readfile(tc, args[0], args[1], args[2]);
176
177      case M5OP_DEBUG_BREAK:
178        debugbreak(tc);
179        break;
180
181      case M5OP_SWITCH_CPU:
182        switchcpu(tc);
183        break;
184
185      case M5OP_ADD_SYMBOL:
186        addsymbol(tc, args[0], args[1]);
187        break;
188
189      case M5OP_PANIC:
190        panic("M5 panic instruction called at %s\n", tc->pcState());
191
192      case M5OP_WORK_BEGIN:
193        workbegin(tc, args[0], args[1]);
194        break;
195
196      case M5OP_WORK_END:
197        workend(tc, args[0], args[1]);
198        break;
199
200      case M5OP_ANNOTATE:
201      case M5OP_RESERVED2:
202      case M5OP_RESERVED3:
203      case M5OP_RESERVED4:
204      case M5OP_RESERVED5:
205        warn("Unimplemented m5 op (0x%x)\n", func);
206        break;
207
208      /* SE mode functions */
209      case M5OP_SE_SYSCALL:
210        m5Syscall(tc);
211        break;
212
213      case M5OP_SE_PAGE_FAULT:
214        m5PageFault(tc);
215        break;
216
217      /* dist-gem5 functions */
218      case M5OP_DIST_TOGGLE_SYNC:
219        togglesync(tc);
220        break;
221
222      default:
223        warn("Unhandled m5 op: 0x%x\n", func);
224        break;
225    }
226
227    return 0;
228}
229
230void
231arm(ThreadContext *tc)
232{
233    DPRINTF(PseudoInst, "PseudoInst::arm()\n");
234    if (!FullSystem)
235        panicFsOnlyPseudoInst("arm");
236
237    if (tc->getKernelStats())
238        tc->getKernelStats()->arm();
239}
240
241void
242quiesce(ThreadContext *tc)
243{
244    DPRINTF(PseudoInst, "PseudoInst::quiesce()\n");
245    tc->quiesce();
246}
247
248void
249quiesceSkip(ThreadContext *tc)
250{
251    DPRINTF(PseudoInst, "PseudoInst::quiesceSkip()\n");
252    tc->quiesceTick(tc->getCpuPtr()->nextCycle() + 1);
253}
254
255void
256quiesceNs(ThreadContext *tc, uint64_t ns)
257{
258    DPRINTF(PseudoInst, "PseudoInst::quiesceNs(%i)\n", ns);
259    tc->quiesceTick(curTick() + SimClock::Int::ns * ns);
260}
261
262void
263quiesceCycles(ThreadContext *tc, uint64_t cycles)
264{
265    DPRINTF(PseudoInst, "PseudoInst::quiesceCycles(%i)\n", cycles);
266    tc->quiesceTick(tc->getCpuPtr()->clockEdge(Cycles(cycles)));
267}
268
269uint64_t
270quiesceTime(ThreadContext *tc)
271{
272    DPRINTF(PseudoInst, "PseudoInst::quiesceTime()\n");
273
274    return (tc->readLastActivate() - tc->readLastSuspend()) /
275        SimClock::Int::ns;
276}
277
278uint64_t
279rpns(ThreadContext *tc)
280{
281    DPRINTF(PseudoInst, "PseudoInst::rpns()\n");
282    return curTick() / SimClock::Int::ns;
283}
284
285void
286wakeCPU(ThreadContext *tc, uint64_t cpuid)
287{
288    DPRINTF(PseudoInst, "PseudoInst::wakeCPU(%i)\n", cpuid);
289    System *sys = tc->getSystemPtr();
290
291    if (sys->numContexts() <= cpuid) {
292        warn("PseudoInst::wakeCPU(%i), cpuid greater than number of contexts"
293             "(%i)\n",cpuid, sys->numContexts());
294        return;
295    }
296
297    ThreadContext *other_tc = sys->threadContexts[cpuid];
298    if (other_tc->status() == ThreadContext::Suspended)
299        other_tc->activate();
300}
301
302void
303m5exit(ThreadContext *tc, Tick delay)
304{
305    DPRINTF(PseudoInst, "PseudoInst::m5exit(%i)\n", delay);
306    if (DistIface::readyToExit(delay)) {
307        Tick when = curTick() + delay * SimClock::Int::ns;
308        exitSimLoop("m5_exit instruction encountered", 0, when, 0, true);
309    }
310}
311
312void
313m5fail(ThreadContext *tc, Tick delay, uint64_t code)
314{
315    DPRINTF(PseudoInst, "PseudoInst::m5fail(%i, %i)\n", delay, code);
316    Tick when = curTick() + delay * SimClock::Int::ns;
317    exitSimLoop("m5_fail instruction encountered", code, when, 0, true);
318}
319
320void
321loadsymbol(ThreadContext *tc)
322{
323    DPRINTF(PseudoInst, "PseudoInst::loadsymbol()\n");
324    if (!FullSystem)
325        panicFsOnlyPseudoInst("loadsymbol");
326
327    const string &filename = tc->getCpuPtr()->system->params()->symbolfile;
328    if (filename.empty()) {
329        return;
330    }
331
332    std::string buffer;
333    ifstream file(filename.c_str());
334
335    if (!file)
336        fatal("file error: Can't open symbol table file %s\n", filename);
337
338    while (!file.eof()) {
339        getline(file, buffer);
340
341        if (buffer.empty())
342            continue;
343
344        string::size_type idx = buffer.find(' ');
345        if (idx == string::npos)
346            continue;
347
348        string address = "0x" + buffer.substr(0, idx);
349        eat_white(address);
350        if (address.empty())
351            continue;
352
353        // Skip over letter and space
354        string symbol = buffer.substr(idx + 3);
355        eat_white(symbol);
356        if (symbol.empty())
357            continue;
358
359        Addr addr;
360        if (!to_number(address, addr))
361            continue;
362
363        if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol))
364            continue;
365
366
367        DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
368    }
369    file.close();
370}
371
372void
373addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
374{
375    DPRINTF(PseudoInst, "PseudoInst::addsymbol(0x%x, 0x%x)\n",
376            addr, symbolAddr);
377    if (!FullSystem)
378        panicFsOnlyPseudoInst("addSymbol");
379
380    char symb[100];
381    CopyStringOut(tc, symb, symbolAddr, 100);
382    std::string symbol(symb);
383
384    DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
385
386    tc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
387    debugSymbolTable->insert(addr,symbol);
388}
389
390uint64_t
391initParam(ThreadContext *tc, uint64_t key_str1, uint64_t key_str2)
392{
393    DPRINTF(PseudoInst, "PseudoInst::initParam() key:%s%s\n", (char *)&key_str1,
394            (char *)&key_str2);
395    if (!FullSystem) {
396        panicFsOnlyPseudoInst("initParam");
397        return 0;
398    }
399
400    // The key parameter string is passed in via two 64-bit registers. We copy
401    // out the characters from the 64-bit integer variables here and concatenate
402    // them in the key_str character buffer
403    const int len = 2 * sizeof(uint64_t) + 1;
404    char key_str[len];
405    memset(key_str, '\0', len);
406    if (key_str1 == 0) {
407        assert(key_str2 == 0);
408    } else {
409        strncpy(key_str, (char *)&key_str1, sizeof(uint64_t));
410    }
411
412    if (strlen(key_str) == sizeof(uint64_t)) {
413        strncpy(key_str + sizeof(uint64_t), (char *)&key_str2,
414                sizeof(uint64_t));
415    } else {
416        assert(key_str2 == 0);
417    }
418
419    // Compare the key parameter with the known values to select the return
420    // value
421    uint64_t val;
422    if (strcmp(key_str, InitParamKey::DEFAULT) == 0) {
423        val = tc->getCpuPtr()->system->init_param;
424    } else if (strcmp(key_str, InitParamKey::DIST_RANK) == 0) {
425        val = DistIface::rankParam();
426    } else if (strcmp(key_str, InitParamKey::DIST_SIZE) == 0) {
427        val = DistIface::sizeParam();
428    } else {
429        panic("Unknown key for initparam pseudo instruction:\"%s\"", key_str);
430    }
431    return val;
432}
433
434
435void
436resetstats(ThreadContext *tc, Tick delay, Tick period)
437{
438    DPRINTF(PseudoInst, "PseudoInst::resetstats(%i, %i)\n", delay, period);
439    if (!tc->getCpuPtr()->params()->do_statistics_insts)
440        return;
441
442
443    Tick when = curTick() + delay * SimClock::Int::ns;
444    Tick repeat = period * SimClock::Int::ns;
445
446    Stats::schedStatEvent(false, true, when, repeat);
447}
448
449void
450dumpstats(ThreadContext *tc, Tick delay, Tick period)
451{
452    DPRINTF(PseudoInst, "PseudoInst::dumpstats(%i, %i)\n", delay, period);
453    if (!tc->getCpuPtr()->params()->do_statistics_insts)
454        return;
455
456
457    Tick when = curTick() + delay * SimClock::Int::ns;
458    Tick repeat = period * SimClock::Int::ns;
459
460    Stats::schedStatEvent(true, false, when, repeat);
461}
462
463void
464dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
465{
466    DPRINTF(PseudoInst, "PseudoInst::dumpresetstats(%i, %i)\n", delay, period);
467    if (!tc->getCpuPtr()->params()->do_statistics_insts)
468        return;
469
470
471    Tick when = curTick() + delay * SimClock::Int::ns;
472    Tick repeat = period * SimClock::Int::ns;
473
474    Stats::schedStatEvent(true, true, when, repeat);
475}
476
477void
478m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
479{
480    DPRINTF(PseudoInst, "PseudoInst::m5checkpoint(%i, %i)\n", delay, period);
481    if (!tc->getCpuPtr()->params()->do_checkpoint_insts)
482        return;
483
484    if (DistIface::readyToCkpt(delay, period)) {
485        Tick when = curTick() + delay * SimClock::Int::ns;
486        Tick repeat = period * SimClock::Int::ns;
487        exitSimLoop("checkpoint", 0, when, repeat);
488    }
489}
490
491uint64_t
492readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
493{
494    DPRINTF(PseudoInst, "PseudoInst::readfile(0x%x, 0x%x, 0x%x)\n",
495            vaddr, len, offset);
496    if (!FullSystem) {
497        panicFsOnlyPseudoInst("readfile");
498        return 0;
499    }
500
501    const string &file = tc->getSystemPtr()->params()->readfile;
502    if (file.empty()) {
503        return ULL(0);
504    }
505
506    uint64_t result = 0;
507
508    int fd = ::open(file.c_str(), O_RDONLY, 0);
509    if (fd < 0)
510        panic("could not open file %s\n", file);
511
512    if (::lseek(fd, offset, SEEK_SET) < 0)
513        panic("could not seek: %s", strerror(errno));
514
515    char *buf = new char[len];
516    char *p = buf;
517    while (len > 0) {
518        int bytes = ::read(fd, p, len);
519        if (bytes <= 0)
520            break;
521
522        p += bytes;
523        result += bytes;
524        len -= bytes;
525    }
526
527    close(fd);
528    CopyIn(tc, vaddr, buf, result);
529    delete [] buf;
530    return result;
531}
532
533uint64_t
534writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset,
535            Addr filename_addr)
536{
537    DPRINTF(PseudoInst, "PseudoInst::writefile(0x%x, 0x%x, 0x%x, 0x%x)\n",
538            vaddr, len, offset, filename_addr);
539
540    // copy out target filename
541    char fn[100];
542    std::string filename;
543    CopyStringOut(tc, fn, filename_addr, 100);
544    filename = std::string(fn);
545
546    OutputStream *out;
547    if (offset == 0) {
548        // create a new file (truncate)
549        out = simout.create(filename, true, true);
550    } else {
551        // do not truncate file if offset is non-zero
552        // (ios::in flag is required as well to keep the existing data
553        //  intact, otherwise existing data will be zeroed out.)
554        out = simout.open(filename, ios::in | ios::out | ios::binary, true);
555    }
556
557    ostream *os(out->stream());
558    if (!os)
559        panic("could not open file %s\n", filename);
560
561    // seek to offset
562    os->seekp(offset);
563
564    // copy out data and write to file
565    char *buf = new char[len];
566    CopyOut(tc, buf, vaddr, len);
567    os->write(buf, len);
568    if (os->fail() || os->bad())
569        panic("Error while doing writefile!\n");
570
571    simout.close(out);
572
573    delete [] buf;
574
575    return len;
576}
577
578void
579debugbreak(ThreadContext *tc)
580{
581    DPRINTF(PseudoInst, "PseudoInst::debugbreak()\n");
582    Debug::breakpoint();
583}
584
585void
586switchcpu(ThreadContext *tc)
587{
588    DPRINTF(PseudoInst, "PseudoInst::switchcpu()\n");
589    exitSimLoop("switchcpu");
590}
591
592void
593togglesync(ThreadContext *tc)
594{
595    DPRINTF(PseudoInst, "PseudoInst::togglesync()\n");
596    DistIface::toggleSync(tc);
597}
598
599//
600// This function is executed when annotated work items begin.  Depending on
601// what the user specified at the command line, the simulation may exit and/or
602// take a checkpoint when a certain work item begins.
603//
604void
605workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid)
606{
607    DPRINTF(PseudoInst, "PseudoInst::workbegin(%i, %i)\n", workid, threadid);
608    System *sys = tc->getSystemPtr();
609    const System::Params *params = sys->params();
610
611    if (params->exit_on_work_items) {
612        exitSimLoop("workbegin", static_cast<int>(workid));
613        return;
614    }
615
616    DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid,
617            threadid);
618    tc->getCpuPtr()->workItemBegin();
619    sys->workItemBegin(threadid, workid);
620
621    //
622    // If specified, determine if this is the specific work item the user
623    // identified
624    //
625    if (params->work_item_id == -1 || params->work_item_id == workid) {
626
627        uint64_t systemWorkBeginCount = sys->incWorkItemsBegin();
628        int cpuId = tc->getCpuPtr()->cpuId();
629
630        if (params->work_cpus_ckpt_count != 0 &&
631            sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
632            //
633            // If active cpus equals checkpoint count, create checkpoint
634            //
635            exitSimLoop("checkpoint");
636        }
637
638        if (systemWorkBeginCount == params->work_begin_ckpt_count) {
639            //
640            // Note: the string specified as the cause of the exit event must
641            // exactly equal "checkpoint" inorder to create a checkpoint
642            //
643            exitSimLoop("checkpoint");
644        }
645
646        if (systemWorkBeginCount == params->work_begin_exit_count) {
647            //
648            // If a certain number of work items started, exit simulation
649            //
650            exitSimLoop("work started count reach");
651        }
652
653        if (cpuId == params->work_begin_cpu_id_exit) {
654            //
655            // If work started on the cpu id specified, exit simulation
656            //
657            exitSimLoop("work started on specific cpu");
658        }
659    }
660}
661
662//
663// This function is executed when annotated work items end.  Depending on
664// what the user specified at the command line, the simulation may exit and/or
665// take a checkpoint when a certain work item ends.
666//
667void
668workend(ThreadContext *tc, uint64_t workid, uint64_t threadid)
669{
670    DPRINTF(PseudoInst, "PseudoInst::workend(%i, %i)\n", workid, threadid);
671    System *sys = tc->getSystemPtr();
672    const System::Params *params = sys->params();
673
674    if (params->exit_on_work_items) {
675        exitSimLoop("workend", static_cast<int>(workid));
676        return;
677    }
678
679    DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid);
680    tc->getCpuPtr()->workItemEnd();
681    sys->workItemEnd(threadid, workid);
682
683    //
684    // If specified, determine if this is the specific work item the user
685    // identified
686    //
687    if (params->work_item_id == -1 || params->work_item_id == workid) {
688
689        uint64_t systemWorkEndCount = sys->incWorkItemsEnd();
690        int cpuId = tc->getCpuPtr()->cpuId();
691
692        if (params->work_cpus_ckpt_count != 0 &&
693            sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
694            //
695            // If active cpus equals checkpoint count, create checkpoint
696            //
697            exitSimLoop("checkpoint");
698        }
699
700        if (params->work_end_ckpt_count != 0 &&
701            systemWorkEndCount == params->work_end_ckpt_count) {
702            //
703            // If total work items completed equals checkpoint count, create
704            // checkpoint
705            //
706            exitSimLoop("checkpoint");
707        }
708
709        if (params->work_end_exit_count != 0 &&
710            systemWorkEndCount == params->work_end_exit_count) {
711            //
712            // If total work items completed equals exit count, exit simulation
713            //
714            exitSimLoop("work items exit count reached");
715        }
716    }
717}
718
719} // namespace PseudoInst
720