pseudo_inst.cc revision 12145
1/* 2 * Copyright (c) 2010-2012, 2015, 2017 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2011 Advanced Micro Devices, Inc. 15 * Copyright (c) 2003-2006 The Regents of The University of Michigan 16 * All rights reserved. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions are 20 * met: redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer; 22 * redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution; 25 * neither the name of the copyright holders nor the names of its 26 * contributors may be used to endorse or promote products derived from 27 * this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * Authors: Nathan Binkert 42 */ 43 44#include "sim/pseudo_inst.hh" 45 46#include <fcntl.h> 47#include <unistd.h> 48 49#include <cerrno> 50#include <fstream> 51#include <string> 52#include <vector> 53 54#include "arch/kernel_stats.hh" 55#include "arch/pseudo_inst.hh" 56#include "arch/utility.hh" 57#include "arch/vtophys.hh" 58#include "base/debug.hh" 59#include "base/output.hh" 60#include "config/the_isa.hh" 61#include "cpu/base.hh" 62#include "cpu/quiesce_event.hh" 63#include "cpu/thread_context.hh" 64#include "debug/Loader.hh" 65#include "debug/PseudoInst.hh" 66#include "debug/Quiesce.hh" 67#include "debug/WorkItems.hh" 68#include "dev/net/dist_iface.hh" 69#include "params/BaseCPU.hh" 70#include "sim/full_system.hh" 71#include "sim/initparam_keys.hh" 72#include "sim/process.hh" 73#include "sim/serialize.hh" 74#include "sim/sim_events.hh" 75#include "sim/sim_exit.hh" 76#include "sim/stat_control.hh" 77#include "sim/stats.hh" 78#include "sim/system.hh" 79#include "sim/vptr.hh" 80 81using namespace std; 82 83using namespace Stats; 84using namespace TheISA; 85 86namespace PseudoInst { 87 88static inline void 89panicFsOnlyPseudoInst(const char *name) 90{ 91 panic("Pseudo inst \"%s\" is only available in Full System mode."); 92} 93 94uint64_t 95pseudoInst(ThreadContext *tc, uint8_t func, uint8_t subfunc) 96{ 97 uint64_t args[4]; 98 99 DPRINTF(PseudoInst, "PseudoInst::pseudoInst(%i, %i)\n", func, subfunc); 100 101 // We need to do this in a slightly convoluted way since 102 // getArgument() might have side-effects on arg_num. We could have 103 // used the Argument class, but due to the possible side effects 104 // from getArgument, it'd most likely break. 105 int arg_num(0); 106 for (int i = 0; i < sizeof(args) / sizeof(*args); ++i) { 107 args[arg_num] = getArgument(tc, arg_num, sizeof(uint64_t), false); 108 ++arg_num; 109 } 110 111 switch (func) { 112 case 0x00: // arm_func 113 arm(tc); 114 break; 115 116 case 0x01: // quiesce_func 117 quiesce(tc); 118 break; 119 120 case 0x02: // quiescens_func 121 quiesceSkip(tc); 122 break; 123 124 case 0x03: // quiescecycle_func 125 quiesceNs(tc, args[0]); 126 break; 127 128 case 0x04: // quiescetime_func 129 return quiesceTime(tc); 130 131 case 0x07: // rpns_func 132 return rpns(tc); 133 134 case 0x09: // wakecpu_func 135 wakeCPU(tc, args[0]); 136 break; 137 138 case 0x21: // exit_func 139 m5exit(tc, args[0]); 140 break; 141 142 case 0x22: 143 m5fail(tc, args[0], args[1]); 144 break; 145 146 case 0x30: // initparam_func 147 return initParam(tc, args[0], args[1]); 148 149 case 0x31: // loadsymbol_func 150 loadsymbol(tc); 151 break; 152 153 case 0x40: // resetstats_func 154 resetstats(tc, args[0], args[1]); 155 break; 156 157 case 0x41: // dumpstats_func 158 dumpstats(tc, args[0], args[1]); 159 break; 160 161 case 0x42: // dumprststats_func 162 dumpresetstats(tc, args[0], args[1]); 163 break; 164 165 case 0x43: // ckpt_func 166 m5checkpoint(tc, args[0], args[1]); 167 break; 168 169 case 0x4f: // writefile_func 170 return writefile(tc, args[0], args[1], args[2], args[3]); 171 172 case 0x50: // readfile_func 173 return readfile(tc, args[0], args[1], args[2]); 174 175 case 0x51: // debugbreak_func 176 debugbreak(tc); 177 break; 178 179 case 0x52: // switchcpu_func 180 switchcpu(tc); 181 break; 182 183 case 0x53: // addsymbol_func 184 addsymbol(tc, args[0], args[1]); 185 break; 186 187 case 0x54: // panic_func 188 panic("M5 panic instruction called at %s\n", tc->pcState()); 189 190 case 0x5a: // work_begin_func 191 workbegin(tc, args[0], args[1]); 192 break; 193 194 case 0x5b: // work_end_func 195 workend(tc, args[0], args[1]); 196 break; 197 198 case 0x55: // annotate_func 199 case 0x56: // reserved2_func 200 case 0x57: // reserved3_func 201 case 0x58: // reserved4_func 202 case 0x59: // reserved5_func 203 warn("Unimplemented m5 op (0x%x)\n", func); 204 break; 205 206 /* SE mode functions */ 207 case 0x60: // syscall_func 208 m5Syscall(tc); 209 break; 210 211 case 0x61: // pagefault_func 212 m5PageFault(tc); 213 break; 214 215 /* dist-gem5 functions */ 216 case 0x62: // distToggleSync_func 217 togglesync(tc); 218 break; 219 220 default: 221 warn("Unhandled m5 op: 0x%x\n", func); 222 break; 223 } 224 225 return 0; 226} 227 228void 229arm(ThreadContext *tc) 230{ 231 DPRINTF(PseudoInst, "PseudoInst::arm()\n"); 232 if (!FullSystem) 233 panicFsOnlyPseudoInst("arm"); 234 235 if (tc->getKernelStats()) 236 tc->getKernelStats()->arm(); 237} 238 239void 240quiesce(ThreadContext *tc) 241{ 242 DPRINTF(PseudoInst, "PseudoInst::quiesce()\n"); 243 tc->quiesce(); 244} 245 246void 247quiesceSkip(ThreadContext *tc) 248{ 249 DPRINTF(PseudoInst, "PseudoInst::quiesceSkip()\n"); 250 tc->quiesceTick(tc->getCpuPtr()->nextCycle() + 1); 251} 252 253void 254quiesceNs(ThreadContext *tc, uint64_t ns) 255{ 256 DPRINTF(PseudoInst, "PseudoInst::quiesceNs(%i)\n", ns); 257 tc->quiesceTick(curTick() + SimClock::Int::ns * ns); 258} 259 260void 261quiesceCycles(ThreadContext *tc, uint64_t cycles) 262{ 263 DPRINTF(PseudoInst, "PseudoInst::quiesceCycles(%i)\n", cycles); 264 tc->quiesceTick(tc->getCpuPtr()->clockEdge(Cycles(cycles))); 265} 266 267uint64_t 268quiesceTime(ThreadContext *tc) 269{ 270 DPRINTF(PseudoInst, "PseudoInst::quiesceTime()\n"); 271 272 return (tc->readLastActivate() - tc->readLastSuspend()) / 273 SimClock::Int::ns; 274} 275 276uint64_t 277rpns(ThreadContext *tc) 278{ 279 DPRINTF(PseudoInst, "PseudoInst::rpns()\n"); 280 return curTick() / SimClock::Int::ns; 281} 282 283void 284wakeCPU(ThreadContext *tc, uint64_t cpuid) 285{ 286 DPRINTF(PseudoInst, "PseudoInst::wakeCPU(%i)\n", cpuid); 287 System *sys = tc->getSystemPtr(); 288 289 if (sys->numContexts() <= cpuid) { 290 warn("PseudoInst::wakeCPU(%i), cpuid greater than number of contexts" 291 "(%i)\n",cpuid, sys->numContexts()); 292 return; 293 } 294 295 ThreadContext *other_tc = sys->threadContexts[cpuid]; 296 if (other_tc->status() == ThreadContext::Suspended) 297 other_tc->activate(); 298} 299 300void 301m5exit(ThreadContext *tc, Tick delay) 302{ 303 DPRINTF(PseudoInst, "PseudoInst::m5exit(%i)\n", delay); 304 if (DistIface::readyToExit(delay)) { 305 Tick when = curTick() + delay * SimClock::Int::ns; 306 exitSimLoop("m5_exit instruction encountered", 0, when, 0, true); 307 } 308} 309 310void 311m5fail(ThreadContext *tc, Tick delay, uint64_t code) 312{ 313 DPRINTF(PseudoInst, "PseudoInst::m5fail(%i, %i)\n", delay, code); 314 Tick when = curTick() + delay * SimClock::Int::ns; 315 exitSimLoop("m5_fail instruction encountered", code, when, 0, true); 316} 317 318void 319loadsymbol(ThreadContext *tc) 320{ 321 DPRINTF(PseudoInst, "PseudoInst::loadsymbol()\n"); 322 if (!FullSystem) 323 panicFsOnlyPseudoInst("loadsymbol"); 324 325 const string &filename = tc->getCpuPtr()->system->params()->symbolfile; 326 if (filename.empty()) { 327 return; 328 } 329 330 std::string buffer; 331 ifstream file(filename.c_str()); 332 333 if (!file) 334 fatal("file error: Can't open symbol table file %s\n", filename); 335 336 while (!file.eof()) { 337 getline(file, buffer); 338 339 if (buffer.empty()) 340 continue; 341 342 string::size_type idx = buffer.find(' '); 343 if (idx == string::npos) 344 continue; 345 346 string address = "0x" + buffer.substr(0, idx); 347 eat_white(address); 348 if (address.empty()) 349 continue; 350 351 // Skip over letter and space 352 string symbol = buffer.substr(idx + 3); 353 eat_white(symbol); 354 if (symbol.empty()) 355 continue; 356 357 Addr addr; 358 if (!to_number(address, addr)) 359 continue; 360 361 if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol)) 362 continue; 363 364 365 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 366 } 367 file.close(); 368} 369 370void 371addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr) 372{ 373 DPRINTF(PseudoInst, "PseudoInst::addsymbol(0x%x, 0x%x)\n", 374 addr, symbolAddr); 375 if (!FullSystem) 376 panicFsOnlyPseudoInst("addSymbol"); 377 378 char symb[100]; 379 CopyStringOut(tc, symb, symbolAddr, 100); 380 std::string symbol(symb); 381 382 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 383 384 tc->getSystemPtr()->kernelSymtab->insert(addr,symbol); 385 debugSymbolTable->insert(addr,symbol); 386} 387 388uint64_t 389initParam(ThreadContext *tc, uint64_t key_str1, uint64_t key_str2) 390{ 391 DPRINTF(PseudoInst, "PseudoInst::initParam() key:%s%s\n", (char *)&key_str1, 392 (char *)&key_str2); 393 if (!FullSystem) { 394 panicFsOnlyPseudoInst("initParam"); 395 return 0; 396 } 397 398 // The key parameter string is passed in via two 64-bit registers. We copy 399 // out the characters from the 64-bit integer variables here and concatenate 400 // them in the key_str character buffer 401 const int len = 2 * sizeof(uint64_t) + 1; 402 char key_str[len]; 403 memset(key_str, '\0', len); 404 if (key_str1 == 0) { 405 assert(key_str2 == 0); 406 } else { 407 strncpy(key_str, (char *)&key_str1, sizeof(uint64_t)); 408 } 409 410 if (strlen(key_str) == sizeof(uint64_t)) { 411 strncpy(key_str + sizeof(uint64_t), (char *)&key_str2, 412 sizeof(uint64_t)); 413 } else { 414 assert(key_str2 == 0); 415 } 416 417 // Compare the key parameter with the known values to select the return 418 // value 419 uint64_t val; 420 if (strcmp(key_str, InitParamKey::DEFAULT) == 0) { 421 val = tc->getCpuPtr()->system->init_param; 422 } else if (strcmp(key_str, InitParamKey::DIST_RANK) == 0) { 423 val = DistIface::rankParam(); 424 } else if (strcmp(key_str, InitParamKey::DIST_SIZE) == 0) { 425 val = DistIface::sizeParam(); 426 } else { 427 panic("Unknown key for initparam pseudo instruction:\"%s\"", key_str); 428 } 429 return val; 430} 431 432 433void 434resetstats(ThreadContext *tc, Tick delay, Tick period) 435{ 436 DPRINTF(PseudoInst, "PseudoInst::resetstats(%i, %i)\n", delay, period); 437 if (!tc->getCpuPtr()->params()->do_statistics_insts) 438 return; 439 440 441 Tick when = curTick() + delay * SimClock::Int::ns; 442 Tick repeat = period * SimClock::Int::ns; 443 444 Stats::schedStatEvent(false, true, when, repeat); 445} 446 447void 448dumpstats(ThreadContext *tc, Tick delay, Tick period) 449{ 450 DPRINTF(PseudoInst, "PseudoInst::dumpstats(%i, %i)\n", delay, period); 451 if (!tc->getCpuPtr()->params()->do_statistics_insts) 452 return; 453 454 455 Tick when = curTick() + delay * SimClock::Int::ns; 456 Tick repeat = period * SimClock::Int::ns; 457 458 Stats::schedStatEvent(true, false, when, repeat); 459} 460 461void 462dumpresetstats(ThreadContext *tc, Tick delay, Tick period) 463{ 464 DPRINTF(PseudoInst, "PseudoInst::dumpresetstats(%i, %i)\n", delay, period); 465 if (!tc->getCpuPtr()->params()->do_statistics_insts) 466 return; 467 468 469 Tick when = curTick() + delay * SimClock::Int::ns; 470 Tick repeat = period * SimClock::Int::ns; 471 472 Stats::schedStatEvent(true, true, when, repeat); 473} 474 475void 476m5checkpoint(ThreadContext *tc, Tick delay, Tick period) 477{ 478 DPRINTF(PseudoInst, "PseudoInst::m5checkpoint(%i, %i)\n", delay, period); 479 if (!tc->getCpuPtr()->params()->do_checkpoint_insts) 480 return; 481 482 if (DistIface::readyToCkpt(delay, period)) { 483 Tick when = curTick() + delay * SimClock::Int::ns; 484 Tick repeat = period * SimClock::Int::ns; 485 exitSimLoop("checkpoint", 0, when, repeat); 486 } 487} 488 489uint64_t 490readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset) 491{ 492 DPRINTF(PseudoInst, "PseudoInst::readfile(0x%x, 0x%x, 0x%x)\n", 493 vaddr, len, offset); 494 if (!FullSystem) { 495 panicFsOnlyPseudoInst("readfile"); 496 return 0; 497 } 498 499 const string &file = tc->getSystemPtr()->params()->readfile; 500 if (file.empty()) { 501 return ULL(0); 502 } 503 504 uint64_t result = 0; 505 506 int fd = ::open(file.c_str(), O_RDONLY, 0); 507 if (fd < 0) 508 panic("could not open file %s\n", file); 509 510 if (::lseek(fd, offset, SEEK_SET) < 0) 511 panic("could not seek: %s", strerror(errno)); 512 513 char *buf = new char[len]; 514 char *p = buf; 515 while (len > 0) { 516 int bytes = ::read(fd, p, len); 517 if (bytes <= 0) 518 break; 519 520 p += bytes; 521 result += bytes; 522 len -= bytes; 523 } 524 525 close(fd); 526 CopyIn(tc, vaddr, buf, result); 527 delete [] buf; 528 return result; 529} 530 531uint64_t 532writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset, 533 Addr filename_addr) 534{ 535 DPRINTF(PseudoInst, "PseudoInst::writefile(0x%x, 0x%x, 0x%x, 0x%x)\n", 536 vaddr, len, offset, filename_addr); 537 538 // copy out target filename 539 char fn[100]; 540 std::string filename; 541 CopyStringOut(tc, fn, filename_addr, 100); 542 filename = std::string(fn); 543 544 OutputStream *out; 545 if (offset == 0) { 546 // create a new file (truncate) 547 out = simout.create(filename, true, true); 548 } else { 549 // do not truncate file if offset is non-zero 550 // (ios::in flag is required as well to keep the existing data 551 // intact, otherwise existing data will be zeroed out.) 552 out = simout.open(filename, ios::in | ios::out | ios::binary, true); 553 } 554 555 ostream *os(out->stream()); 556 if (!os) 557 panic("could not open file %s\n", filename); 558 559 // seek to offset 560 os->seekp(offset); 561 562 // copy out data and write to file 563 char *buf = new char[len]; 564 CopyOut(tc, buf, vaddr, len); 565 os->write(buf, len); 566 if (os->fail() || os->bad()) 567 panic("Error while doing writefile!\n"); 568 569 simout.close(out); 570 571 delete [] buf; 572 573 return len; 574} 575 576void 577debugbreak(ThreadContext *tc) 578{ 579 DPRINTF(PseudoInst, "PseudoInst::debugbreak()\n"); 580 Debug::breakpoint(); 581} 582 583void 584switchcpu(ThreadContext *tc) 585{ 586 DPRINTF(PseudoInst, "PseudoInst::switchcpu()\n"); 587 exitSimLoop("switchcpu"); 588} 589 590void 591togglesync(ThreadContext *tc) 592{ 593 DPRINTF(PseudoInst, "PseudoInst::togglesync()\n"); 594 DistIface::toggleSync(tc); 595} 596 597// 598// This function is executed when annotated work items begin. Depending on 599// what the user specified at the command line, the simulation may exit and/or 600// take a checkpoint when a certain work item begins. 601// 602void 603workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid) 604{ 605 DPRINTF(PseudoInst, "PseudoInst::workbegin(%i, %i)\n", workid, threadid); 606 System *sys = tc->getSystemPtr(); 607 const System::Params *params = sys->params(); 608 609 if (params->exit_on_work_items) { 610 exitSimLoop("workbegin", static_cast<int>(workid)); 611 return; 612 } 613 614 DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid, 615 threadid); 616 tc->getCpuPtr()->workItemBegin(); 617 sys->workItemBegin(threadid, workid); 618 619 // 620 // If specified, determine if this is the specific work item the user 621 // identified 622 // 623 if (params->work_item_id == -1 || params->work_item_id == workid) { 624 625 uint64_t systemWorkBeginCount = sys->incWorkItemsBegin(); 626 int cpuId = tc->getCpuPtr()->cpuId(); 627 628 if (params->work_cpus_ckpt_count != 0 && 629 sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) { 630 // 631 // If active cpus equals checkpoint count, create checkpoint 632 // 633 exitSimLoop("checkpoint"); 634 } 635 636 if (systemWorkBeginCount == params->work_begin_ckpt_count) { 637 // 638 // Note: the string specified as the cause of the exit event must 639 // exactly equal "checkpoint" inorder to create a checkpoint 640 // 641 exitSimLoop("checkpoint"); 642 } 643 644 if (systemWorkBeginCount == params->work_begin_exit_count) { 645 // 646 // If a certain number of work items started, exit simulation 647 // 648 exitSimLoop("work started count reach"); 649 } 650 651 if (cpuId == params->work_begin_cpu_id_exit) { 652 // 653 // If work started on the cpu id specified, exit simulation 654 // 655 exitSimLoop("work started on specific cpu"); 656 } 657 } 658} 659 660// 661// This function is executed when annotated work items end. Depending on 662// what the user specified at the command line, the simulation may exit and/or 663// take a checkpoint when a certain work item ends. 664// 665void 666workend(ThreadContext *tc, uint64_t workid, uint64_t threadid) 667{ 668 DPRINTF(PseudoInst, "PseudoInst::workend(%i, %i)\n", workid, threadid); 669 System *sys = tc->getSystemPtr(); 670 const System::Params *params = sys->params(); 671 672 if (params->exit_on_work_items) { 673 exitSimLoop("workend", static_cast<int>(workid)); 674 return; 675 } 676 677 DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid); 678 tc->getCpuPtr()->workItemEnd(); 679 sys->workItemEnd(threadid, workid); 680 681 // 682 // If specified, determine if this is the specific work item the user 683 // identified 684 // 685 if (params->work_item_id == -1 || params->work_item_id == workid) { 686 687 uint64_t systemWorkEndCount = sys->incWorkItemsEnd(); 688 int cpuId = tc->getCpuPtr()->cpuId(); 689 690 if (params->work_cpus_ckpt_count != 0 && 691 sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) { 692 // 693 // If active cpus equals checkpoint count, create checkpoint 694 // 695 exitSimLoop("checkpoint"); 696 } 697 698 if (params->work_end_ckpt_count != 0 && 699 systemWorkEndCount == params->work_end_ckpt_count) { 700 // 701 // If total work items completed equals checkpoint count, create 702 // checkpoint 703 // 704 exitSimLoop("checkpoint"); 705 } 706 707 if (params->work_end_exit_count != 0 && 708 systemWorkEndCount == params->work_end_exit_count) { 709 // 710 // If total work items completed equals exit count, exit simulation 711 // 712 exitSimLoop("work items exit count reached"); 713 } 714 } 715} 716 717} // namespace PseudoInst 718