pseudo_inst.cc revision 298 
1/*
2 * Copyright (c) 2003 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include "arch/alpha/pseudo_inst.hh"
30#include "cpu/exec_context.hh"
31#include "sim/serialize.hh"
32#include "sim/sim_exit.hh"
33#include "sim/sim_stats.hh"
34
35using namespace Statistics;
36
37namespace AlphaPseudo
38{
39    void
40    m5exit_old(ExecContext *xc)
41    {
42        SimExit(curTick, "m5_exit_old instruction encountered");
43    }
44
45    void
46    m5exit(ExecContext *xc)
47    {
48        Tick delay = xc->regs.intRegFile[16];
49        Tick when = curTick + NS2Ticks(delay);
50        SimExit(when, "m5_exit instruction encountered");
51    }
52
53    void
54    resetstats(ExecContext *xc)
55    {
56        Tick delay = xc->regs.intRegFile[16];
57        Tick period = xc->regs.intRegFile[17];
58
59        Tick when = curTick + NS2Ticks(delay);
60        Tick repeat = NS2Ticks(period);
61
62        SetupEvent(Reset, when, repeat);
63    }
64
65    void
66    dumpstats(ExecContext *xc)
67    {
68        Tick delay = xc->regs.intRegFile[16];
69        Tick period = xc->regs.intRegFile[17];
70
71        Tick when = curTick + NS2Ticks(delay);
72        Tick repeat = NS2Ticks(period);
73
74        SetupEvent(Dump, when, repeat);
75    }
76
77    void
78    dumpresetstats(ExecContext *xc)
79    {
80        Tick delay = xc->regs.intRegFile[16];
81        Tick period = xc->regs.intRegFile[17];
82
83        Tick when = curTick + NS2Ticks(delay);
84        Tick repeat = NS2Ticks(period);
85
86        SetupEvent(Dump|Reset, when, repeat);
87    }
88
89    void
90    m5checkpoint(ExecContext *xc)
91    {
92        Tick delay = xc->regs.intRegFile[16];
93        Tick period = xc->regs.intRegFile[17];
94
95        Tick when = curTick + NS2Ticks(delay);
96        Tick repeat = NS2Ticks(period);
97
98        SetupCheckpoint(when, repeat);
99    }
100
101}
102