pseudo_inst.cc revision 1642 
1/*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <errno.h>
30#include <fcntl.h>
31#include <unistd.h>
32#include <cstdio>
33
34#include <string>
35
36#include "arch/alpha/pseudo_inst.hh"
37#include "arch/alpha/vtophys.hh"
38#include "cpu/base_cpu.hh"
39#include "cpu/sampling_cpu/sampling_cpu.hh"
40#include "cpu/exec_context.hh"
41#include "kern/kernel_stats.hh"
42#include "sim/param.hh"
43#include "sim/serialize.hh"
44#include "sim/sim_exit.hh"
45#include "sim/stat_control.hh"
46#include "sim/stats.hh"
47#include "sim/system.hh"
48#include "sim/debug.hh"
49
50using namespace std;
51
52extern SamplingCPU *SampCPU;
53
54using namespace Stats;
55
56namespace AlphaPseudo
57{
58    bool doStatisticsInsts;
59    bool doCheckpointInsts;
60    bool doQuiesce;
61
62    void
63    arm(ExecContext *xc)
64    {
65        xc->kernelStats->arm();
66    }
67
68    void
69    quiesce(ExecContext *xc)
70    {
71        if (!doQuiesce)
72            return;
73
74        xc->suspend();
75        xc->kernelStats->quiesce();
76    }
77
78    void
79    ivlb(ExecContext *xc)
80    {
81        xc->kernelStats->ivlb();
82    }
83
84    void
85    ivle(ExecContext *xc)
86    {
87    }
88
89    void
90    m5exit_old(ExecContext *xc)
91    {
92        SimExit(curTick, "m5_exit_old instruction encountered");
93    }
94
95    void
96    m5exit(ExecContext *xc)
97    {
98        Tick delay = xc->regs.intRegFile[16];
99        Tick when = curTick + delay * Clock::Int::ns;
100        SimExit(when, "m5_exit instruction encountered");
101    }
102
103    void
104    resetstats(ExecContext *xc)
105    {
106        if (!doStatisticsInsts)
107            return;
108
109        Tick delay = xc->regs.intRegFile[16];
110        Tick period = xc->regs.intRegFile[17];
111
112        Tick when = curTick + delay * Clock::Int::ns;
113        Tick repeat = period * Clock::Int::ns;
114
115        using namespace Stats;
116        SetupEvent(Reset, when, repeat);
117    }
118
119    void
120    dumpstats(ExecContext *xc)
121    {
122        if (!doStatisticsInsts)
123            return;
124
125        Tick delay = xc->regs.intRegFile[16];
126        Tick period = xc->regs.intRegFile[17];
127
128        Tick when = curTick + delay * Clock::Int::ns;
129        Tick repeat = period * Clock::Int::ns;
130
131        using namespace Stats;
132        SetupEvent(Dump, when, repeat);
133    }
134
135    void
136    dumpresetstats(ExecContext *xc)
137    {
138        if (!doStatisticsInsts)
139            return;
140
141        Tick delay = xc->regs.intRegFile[16];
142        Tick period = xc->regs.intRegFile[17];
143
144        Tick when = curTick + delay * Clock::Int::ns;
145        Tick repeat = period * Clock::Int::ns;
146
147        using namespace Stats;
148        SetupEvent(Dump|Reset, when, repeat);
149    }
150
151    void
152    m5checkpoint(ExecContext *xc)
153    {
154        if (!doCheckpointInsts)
155            return;
156
157        Tick delay = xc->regs.intRegFile[16];
158        Tick period = xc->regs.intRegFile[17];
159
160        Tick when = curTick + delay * Clock::Int::ns;
161        Tick repeat = period * Clock::Int::ns;
162
163        Checkpoint::setup(when, repeat);
164    }
165
166    void
167    readfile(ExecContext *xc)
168    {
169        const string &file = xc->cpu->system->params->readfile;
170        if (file.empty()) {
171            xc->regs.intRegFile[0] = ULL(0);
172            return;
173        }
174
175        Addr vaddr = xc->regs.intRegFile[16];
176        uint64_t len = xc->regs.intRegFile[17];
177        uint64_t offset = xc->regs.intRegFile[18];
178        uint64_t result = 0;
179
180        int fd = ::open(file.c_str(), O_RDONLY, 0);
181        if (fd < 0)
182            panic("could not open file %s\n", file);
183
184        if (::lseek(fd, offset, SEEK_SET) < 0)
185            panic("could not seek: %s", strerror(errno));
186
187        char *buf = new char[len];
188        char *p = buf;
189        while (len > 0) {
190            int bytes = ::read(fd, p, len);
191            if (bytes <= 0)
192                break;
193
194            p += bytes;
195            result += bytes;
196            len -= bytes;
197        }
198
199        close(fd);
200        CopyIn(xc, vaddr, buf, result);
201        delete [] buf;
202        xc->regs.intRegFile[0] = result;
203    }
204
205    class Context : public ParamContext
206    {
207      public:
208        Context(const string &section) : ParamContext(section) {}
209        void checkParams();
210    };
211
212    Context context("pseudo_inst");
213
214    Param<bool> __quiesce(&context, "quiesce",
215                          "enable quiesce instructions",
216                          true);
217    Param<bool> __statistics(&context, "statistics",
218                             "enable statistics pseudo instructions",
219                             true);
220    Param<bool> __checkpoint(&context, "checkpoint",
221                             "enable checkpoint pseudo instructions",
222                             true);
223
224    void
225    Context::checkParams()
226    {
227        doQuiesce = __quiesce;
228        doStatisticsInsts = __statistics;
229        doCheckpointInsts = __checkpoint;
230    }
231
232    void debugbreak(ExecContext *xc)
233    {
234        debug_break();
235    }
236
237    void switchcpu(ExecContext *xc)
238    {
239        if (SampCPU)
240            SampCPU->switchCPUs();
241    }
242}
243