SConscript revision 9342
114039Sstacze01@arm.com# -*- mode:python -*-
214039Sstacze01@arm.com
314039Sstacze01@arm.com# Copyright (c) 2006 The Regents of The University of Michigan
414039Sstacze01@arm.com# All rights reserved.
514039Sstacze01@arm.com#
614039Sstacze01@arm.com# Redistribution and use in source and binary forms, with or without
714039Sstacze01@arm.com# modification, are permitted provided that the following conditions are
814039Sstacze01@arm.com# met: redistributions of source code must retain the above copyright
914039Sstacze01@arm.com# notice, this list of conditions and the following disclaimer;
1014039Sstacze01@arm.com# redistributions in binary form must reproduce the above copyright
1114039Sstacze01@arm.com# notice, this list of conditions and the following disclaimer in the
1214039Sstacze01@arm.com# documentation and/or other materials provided with the distribution;
1314039Sstacze01@arm.com# neither the name of the copyright holders nor the names of its
1414039Sstacze01@arm.com# contributors may be used to endorse or promote products derived from
1514039Sstacze01@arm.com# this software without specific prior written permission.
1614039Sstacze01@arm.com#
1714039Sstacze01@arm.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1814039Sstacze01@arm.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
1914039Sstacze01@arm.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
2014039Sstacze01@arm.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
2114039Sstacze01@arm.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
2214039Sstacze01@arm.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
2314039Sstacze01@arm.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2414039Sstacze01@arm.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2514039Sstacze01@arm.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2614039Sstacze01@arm.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
2714039Sstacze01@arm.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2814039Sstacze01@arm.com#
2914039Sstacze01@arm.com# Authors: Nathan Binkert
3014039Sstacze01@arm.com
3114039Sstacze01@arm.comImport('*')
3214039Sstacze01@arm.com
3314039Sstacze01@arm.comSimObject('BaseTLB.py')
3414039Sstacze01@arm.comSimObject('ClockedObject.py')
3514039Sstacze01@arm.comSimObject('Root.py')
3614039Sstacze01@arm.comSimObject('InstTracer.py')
3714039Sstacze01@arm.com
3814039Sstacze01@arm.comSource('arguments.cc')
3914039Sstacze01@arm.comSource('async.cc')
4014039Sstacze01@arm.comSource('core.cc')
4114039Sstacze01@arm.comSource('debug.cc')
4214039Sstacze01@arm.comSource('eventq.cc')
4314039Sstacze01@arm.comSource('init.cc')
4414039Sstacze01@arm.comSource('main.cc', main=True, skip_lib=True)
4514039Sstacze01@arm.comSource('root.cc')
4614039Sstacze01@arm.comSource('serialize.cc')
4714039Sstacze01@arm.comSource('drain.cc')
4814039Sstacze01@arm.comSource('sim_events.cc')
4914039Sstacze01@arm.comSource('sim_object.cc')
5014039Sstacze01@arm.comSource('simulate.cc')
5114039Sstacze01@arm.comSource('stat_control.cc')
5214039Sstacze01@arm.comSource('syscall_emul.cc')
5314039Sstacze01@arm.com
5414039Sstacze01@arm.comif env['TARGET_ISA'] != 'no':
5514039Sstacze01@arm.com    SimObject('Process.py')
5614039Sstacze01@arm.com    SimObject('System.py')
5714039Sstacze01@arm.com    Source('faults.cc')
5814039Sstacze01@arm.com    Source('process.cc')
5914039Sstacze01@arm.com    Source('pseudo_inst.cc')
6014039Sstacze01@arm.com    Source('system.cc')
6114039Sstacze01@arm.com
6214039Sstacze01@arm.comif env['TARGET_ISA'] != 'no':
6314039Sstacze01@arm.com    Source('tlb.cc')
6414039Sstacze01@arm.com
6514039Sstacze01@arm.comDebugFlag('Checkpoint')
6614039Sstacze01@arm.comDebugFlag('Config')
6714039Sstacze01@arm.comDebugFlag('Drain')
6814039Sstacze01@arm.comDebugFlag('Event')
6914039Sstacze01@arm.comDebugFlag('Fault')
7014039Sstacze01@arm.comDebugFlag('Flow')
7114039Sstacze01@arm.comDebugFlag('IPI')
7214039Sstacze01@arm.comDebugFlag('IPR')
7314039Sstacze01@arm.comDebugFlag('Interrupt')
7414039Sstacze01@arm.comDebugFlag('Loader')
7514039Sstacze01@arm.comDebugFlag('Stack')
7614039Sstacze01@arm.comDebugFlag('SyscallVerbose')
7714039Sstacze01@arm.comDebugFlag('TimeSync')
7814039Sstacze01@arm.comDebugFlag('TLB')
7914039Sstacze01@arm.comDebugFlag('Thread')
8014039Sstacze01@arm.comDebugFlag('Timer')
8114039Sstacze01@arm.comDebugFlag('VtoPhys')
8214039Sstacze01@arm.comDebugFlag('WorkItems')
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