SConscript revision 11856
14202Sbinkertn@umich.edu# -*- mode:python -*-
24202Sbinkertn@umich.edu
34202Sbinkertn@umich.edu# Copyright (c) 2006 The Regents of The University of Michigan
44202Sbinkertn@umich.edu# All rights reserved.
54202Sbinkertn@umich.edu#
64202Sbinkertn@umich.edu# Redistribution and use in source and binary forms, with or without
74202Sbinkertn@umich.edu# modification, are permitted provided that the following conditions are
84202Sbinkertn@umich.edu# met: redistributions of source code must retain the above copyright
94202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer;
104202Sbinkertn@umich.edu# redistributions in binary form must reproduce the above copyright
114202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer in the
124202Sbinkertn@umich.edu# documentation and/or other materials provided with the distribution;
134202Sbinkertn@umich.edu# neither the name of the copyright holders nor the names of its
144202Sbinkertn@umich.edu# contributors may be used to endorse or promote products derived from
154202Sbinkertn@umich.edu# this software without specific prior written permission.
164202Sbinkertn@umich.edu#
174202Sbinkertn@umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
184202Sbinkertn@umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
194202Sbinkertn@umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
204202Sbinkertn@umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
214202Sbinkertn@umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
224202Sbinkertn@umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
234202Sbinkertn@umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
244202Sbinkertn@umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
254202Sbinkertn@umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
264202Sbinkertn@umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
274202Sbinkertn@umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
284202Sbinkertn@umich.edu#
294202Sbinkertn@umich.edu# Authors: Nathan Binkert
304202Sbinkertn@umich.edu
314202Sbinkertn@umich.eduImport('*')
324202Sbinkertn@umich.edu
339157Sandreas.hansson@arm.comSimObject('ClockedObject.py')
3410259SAndrew.Bardsley@arm.comSimObject('TickedObject.py')
354486Sbinkertn@umich.eduSimObject('Root.py')
369793Sakash.bagdia@arm.comSimObject('ClockDomain.py')
379827Sakash.bagdia@arm.comSimObject('VoltageDomain.py')
389850Sandreas.hansson@arm.comSimObject('System.py')
3910249Sstephan.diestelhorst@arm.comSimObject('DVFSHandler.py')
4010268SGeoffrey.Blake@arm.comSimObject('SubSystem.py')
414486Sbinkertn@umich.edu
428774Sgblack@eecs.umich.eduSource('arguments.cc')
434202Sbinkertn@umich.eduSource('async.cc')
4411235Sandreas.sandberg@arm.comSource('backtrace_%s.cc' % env['BACKTRACE_IMPL'])
454202Sbinkertn@umich.eduSource('core.cc')
4611077SCurtis.Dunham@arm.comSource('tags.cc')
4710458Sandreas.hansson@arm.comSource('cxx_config.cc')
4810458Sandreas.hansson@arm.comSource('cxx_manager.cc')
4910458Sandreas.hansson@arm.comSource('cxx_config_ini.cc')
504202Sbinkertn@umich.eduSource('debug.cc')
5110453SAndrew.Bardsley@arm.comSource('py_interact.cc', skip_no_python=True)
524202Sbinkertn@umich.eduSource('eventq.cc')
539983Sstever@gmail.comSource('global_event.cc')
5410453SAndrew.Bardsley@arm.comSource('init.cc', skip_no_python=True)
5510453SAndrew.Bardsley@arm.comSource('init_signals.cc')
568233Snate@binkert.orgSource('main.cc', main=True, skip_lib=True)
574202Sbinkertn@umich.eduSource('root.cc')
584202Sbinkertn@umich.eduSource('serialize.cc')
599342SAndreas.Sandberg@arm.comSource('drain.cc')
604202Sbinkertn@umich.eduSource('sim_events.cc')
614202Sbinkertn@umich.eduSource('sim_object.cc')
6210268SGeoffrey.Blake@arm.comSource('sub_system.cc')
6310259SAndrew.Bardsley@arm.comSource('ticked_object.cc')
644202Sbinkertn@umich.eduSource('simulate.cc')
654202Sbinkertn@umich.eduSource('stat_control.cc')
6610453SAndrew.Bardsley@arm.comSource('stat_register.cc', skip_no_python=True)
679793Sakash.bagdia@arm.comSource('clock_domain.cc')
689827Sakash.bagdia@arm.comSource('voltage_domain.cc')
6911420Sdavid.guillen@arm.comSource('linear_solver.cc')
709850Sandreas.hansson@arm.comSource('system.cc')
7110249Sstephan.diestelhorst@arm.comSource('dvfs_handler.cc')
7211524Sdavid.guillen@arm.comSource('clocked_object.cc')
7311527Sdavid.guillen@arm.comSource('mathexpr.cc')
747768SAli.Saidi@ARM.com
759850Sandreas.hansson@arm.comif env['TARGET_ISA'] != 'null':
769850Sandreas.hansson@arm.com    SimObject('InstTracer.py')
778766Sgblack@eecs.umich.edu    SimObject('Process.py')
7811854Sbrandon.potter@amd.com    Source('aux_vector.cc')
797768SAli.Saidi@ARM.com    Source('faults.cc')
808766Sgblack@eecs.umich.edu    Source('process.cc')
8111856Sbrandon.potter@amd.com    Source('fd_array.cc')
8210930Sbrandon.potter@amd.com    Source('fd_entry.cc')
837768SAli.Saidi@ARM.com    Source('pseudo_inst.cc')
849850Sandreas.hansson@arm.com    Source('syscall_emul.cc')
8511794Sbrandon.potter@amd.com    Source('syscall_desc.cc')
864486Sbinkertn@umich.edu
8711800Sbrandon.potter@amd.comif env['TARGET_ISA'] != 'x86':
8811800Sbrandon.potter@amd.com    Source('microcode_rom.cc')
8911800Sbrandon.potter@amd.com
908335Snate@binkert.orgDebugFlag('Checkpoint')
918335Snate@binkert.orgDebugFlag('Config')
9210458Sandreas.hansson@arm.comDebugFlag('CxxConfig')
939152Satgutier@umich.eduDebugFlag('Drain')
948335Snate@binkert.orgDebugFlag('Event')
958335Snate@binkert.orgDebugFlag('Fault')
968335Snate@binkert.orgDebugFlag('Flow')
978335Snate@binkert.orgDebugFlag('IPI')
988335Snate@binkert.orgDebugFlag('IPR')
998335Snate@binkert.orgDebugFlag('Interrupt')
1008335Snate@binkert.orgDebugFlag('Loader')
1019733Sandreas@sandberg.pp.seDebugFlag('PseudoInst')
1028335Snate@binkert.orgDebugFlag('Stack')
10311380Salexandru.dutu@amd.comDebugFlag('SyscallBase')
1048335Snate@binkert.orgDebugFlag('SyscallVerbose')
1058335Snate@binkert.orgDebugFlag('TimeSync')
1068335Snate@binkert.orgDebugFlag('Thread')
1078335Snate@binkert.orgDebugFlag('Timer')
1088335Snate@binkert.orgDebugFlag('VtoPhys')
1098335Snate@binkert.orgDebugFlag('WorkItems')
1109793Sakash.bagdia@arm.comDebugFlag('ClockDomain')
1119827Sakash.bagdia@arm.comDebugFlag('VoltageDomain')
11210249Sstephan.diestelhorst@arm.comDebugFlag('DVFS')
11311380Salexandru.dutu@amd.com
11411380Salexandru.dutu@amd.comCompoundFlag('SyscallAll', [ 'SyscallBase', 'SyscallVerbose'])
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