RubyPort.cc revision 11793:ef606668d247
1/* 2 * Copyright (c) 2012-2013 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2009-2013 Advanced Micro Devices, Inc. 15 * Copyright (c) 2011 Mark D. Hill and David A. Wood 16 * All rights reserved. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions are 20 * met: redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer; 22 * redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution; 25 * neither the name of the copyright holders nor the names of its 26 * contributors may be used to endorse or promote products derived from 27 * this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 */ 41 42#include "mem/ruby/system/RubyPort.hh" 43 44#include "cpu/testers/rubytest/RubyTester.hh" 45#include "debug/Config.hh" 46#include "debug/Drain.hh" 47#include "debug/Ruby.hh" 48#include "mem/protocol/AccessPermission.hh" 49#include "mem/ruby/slicc_interface/AbstractController.hh" 50#include "mem/simple_mem.hh" 51#include "sim/full_system.hh" 52#include "sim/system.hh" 53 54RubyPort::RubyPort(const Params *p) 55 : MemObject(p), m_ruby_system(p->ruby_system), m_version(p->version), 56 m_controller(NULL), m_mandatory_q_ptr(NULL), 57 m_usingRubyTester(p->using_ruby_tester), system(p->system), 58 pioMasterPort(csprintf("%s.pio-master-port", name()), this), 59 pioSlavePort(csprintf("%s.pio-slave-port", name()), this), 60 memMasterPort(csprintf("%s.mem-master-port", name()), this), 61 memSlavePort(csprintf("%s-mem-slave-port", name()), this, 62 p->ruby_system->getAccessBackingStore(), -1, 63 p->no_retry_on_stall), 64 gotAddrRanges(p->port_master_connection_count), 65 m_isCPUSequencer(p->is_cpu_sequencer) 66{ 67 assert(m_version != -1); 68 69 // create the slave ports based on the number of connected ports 70 for (size_t i = 0; i < p->port_slave_connection_count; ++i) { 71 slave_ports.push_back(new MemSlavePort(csprintf("%s.slave%d", name(), 72 i), this, p->ruby_system->getAccessBackingStore(), 73 i, p->no_retry_on_stall)); 74 } 75 76 // create the master ports based on the number of connected ports 77 for (size_t i = 0; i < p->port_master_connection_count; ++i) { 78 master_ports.push_back(new PioMasterPort(csprintf("%s.master%d", 79 name(), i), this)); 80 } 81} 82 83void 84RubyPort::init() 85{ 86 assert(m_controller != NULL); 87 m_mandatory_q_ptr = m_controller->getMandatoryQueue(); 88} 89 90BaseMasterPort & 91RubyPort::getMasterPort(const std::string &if_name, PortID idx) 92{ 93 if (if_name == "mem_master_port") { 94 return memMasterPort; 95 } 96 97 if (if_name == "pio_master_port") { 98 return pioMasterPort; 99 } 100 101 // used by the x86 CPUs to connect the interrupt PIO and interrupt slave 102 // port 103 if (if_name != "master") { 104 // pass it along to our super class 105 return MemObject::getMasterPort(if_name, idx); 106 } else { 107 if (idx >= static_cast<PortID>(master_ports.size())) { 108 panic("RubyPort::getMasterPort: unknown index %d\n", idx); 109 } 110 111 return *master_ports[idx]; 112 } 113} 114 115BaseSlavePort & 116RubyPort::getSlavePort(const std::string &if_name, PortID idx) 117{ 118 if (if_name == "mem_slave_port") { 119 return memSlavePort; 120 } 121 122 if (if_name == "pio_slave_port") 123 return pioSlavePort; 124 125 // used by the CPUs to connect the caches to the interconnect, and 126 // for the x86 case also the interrupt master 127 if (if_name != "slave") { 128 // pass it along to our super class 129 return MemObject::getSlavePort(if_name, idx); 130 } else { 131 if (idx >= static_cast<PortID>(slave_ports.size())) { 132 panic("RubyPort::getSlavePort: unknown index %d\n", idx); 133 } 134 135 return *slave_ports[idx]; 136 } 137} 138 139RubyPort::PioMasterPort::PioMasterPort(const std::string &_name, 140 RubyPort *_port) 141 : QueuedMasterPort(_name, _port, reqQueue, snoopRespQueue), 142 reqQueue(*_port, *this), snoopRespQueue(*_port, *this) 143{ 144 DPRINTF(RubyPort, "Created master pioport on sequencer %s\n", _name); 145} 146 147RubyPort::PioSlavePort::PioSlavePort(const std::string &_name, 148 RubyPort *_port) 149 : QueuedSlavePort(_name, _port, queue), queue(*_port, *this) 150{ 151 DPRINTF(RubyPort, "Created slave pioport on sequencer %s\n", _name); 152} 153 154RubyPort::MemMasterPort::MemMasterPort(const std::string &_name, 155 RubyPort *_port) 156 : QueuedMasterPort(_name, _port, reqQueue, snoopRespQueue), 157 reqQueue(*_port, *this), snoopRespQueue(*_port, *this) 158{ 159 DPRINTF(RubyPort, "Created master memport on ruby sequencer %s\n", _name); 160} 161 162RubyPort::MemSlavePort::MemSlavePort(const std::string &_name, RubyPort *_port, 163 bool _access_backing_store, PortID id, 164 bool _no_retry_on_stall) 165 : QueuedSlavePort(_name, _port, queue, id), queue(*_port, *this), 166 access_backing_store(_access_backing_store), 167 no_retry_on_stall(_no_retry_on_stall) 168{ 169 DPRINTF(RubyPort, "Created slave memport on ruby sequencer %s\n", _name); 170} 171 172bool 173RubyPort::PioMasterPort::recvTimingResp(PacketPtr pkt) 174{ 175 RubyPort *rp = static_cast<RubyPort *>(&owner); 176 DPRINTF(RubyPort, "Response for address: 0x%#x\n", pkt->getAddr()); 177 178 // send next cycle 179 rp->pioSlavePort.schedTimingResp( 180 pkt, curTick() + rp->m_ruby_system->clockPeriod()); 181 return true; 182} 183 184bool RubyPort::MemMasterPort::recvTimingResp(PacketPtr pkt) 185{ 186 // got a response from a device 187 assert(pkt->isResponse()); 188 189 // First we must retrieve the request port from the sender State 190 RubyPort::SenderState *senderState = 191 safe_cast<RubyPort::SenderState *>(pkt->popSenderState()); 192 MemSlavePort *port = senderState->port; 193 assert(port != NULL); 194 delete senderState; 195 196 // In FS mode, ruby memory will receive pio responses from devices 197 // and it must forward these responses back to the particular CPU. 198 DPRINTF(RubyPort, "Pio response for address %#x, going to %s\n", 199 pkt->getAddr(), port->name()); 200 201 // attempt to send the response in the next cycle 202 RubyPort *rp = static_cast<RubyPort *>(&owner); 203 port->schedTimingResp(pkt, curTick() + rp->m_ruby_system->clockPeriod()); 204 205 return true; 206} 207 208bool 209RubyPort::PioSlavePort::recvTimingReq(PacketPtr pkt) 210{ 211 RubyPort *ruby_port = static_cast<RubyPort *>(&owner); 212 213 for (size_t i = 0; i < ruby_port->master_ports.size(); ++i) { 214 AddrRangeList l = ruby_port->master_ports[i]->getAddrRanges(); 215 for (auto it = l.begin(); it != l.end(); ++it) { 216 if (it->contains(pkt->getAddr())) { 217 // generally it is not safe to assume success here as 218 // the port could be blocked 219 bool M5_VAR_USED success = 220 ruby_port->master_ports[i]->sendTimingReq(pkt); 221 assert(success); 222 return true; 223 } 224 } 225 } 226 panic("Should never reach here!\n"); 227} 228 229bool 230RubyPort::MemSlavePort::recvTimingReq(PacketPtr pkt) 231{ 232 DPRINTF(RubyPort, "Timing request for address %#x on port %d\n", 233 pkt->getAddr(), id); 234 RubyPort *ruby_port = static_cast<RubyPort *>(&owner); 235 236 if (pkt->cacheResponding()) 237 panic("RubyPort should never see request with the " 238 "cacheResponding flag set\n"); 239 240 // Check for pio requests and directly send them to the dedicated 241 // pio port. 242 if (pkt->cmd != MemCmd::MemFenceReq) { 243 if (!isPhysMemAddress(pkt->getAddr())) { 244 assert(ruby_port->memMasterPort.isConnected()); 245 DPRINTF(RubyPort, "Request address %#x assumed to be a " 246 "pio address\n", pkt->getAddr()); 247 248 // Save the port in the sender state object to be used later to 249 // route the response 250 pkt->pushSenderState(new SenderState(this)); 251 252 // send next cycle 253 RubySystem *rs = ruby_port->m_ruby_system; 254 ruby_port->memMasterPort.schedTimingReq(pkt, 255 curTick() + rs->clockPeriod()); 256 return true; 257 } 258 259 assert(getOffset(pkt->getAddr()) + pkt->getSize() <= 260 RubySystem::getBlockSizeBytes()); 261 } 262 263 // Submit the ruby request 264 RequestStatus requestStatus = ruby_port->makeRequest(pkt); 265 266 // If the request successfully issued then we should return true. 267 // Otherwise, we need to tell the port to retry at a later point 268 // and return false. 269 if (requestStatus == RequestStatus_Issued) { 270 // Save the port in the sender state object to be used later to 271 // route the response 272 pkt->pushSenderState(new SenderState(this)); 273 274 DPRINTF(RubyPort, "Request %s 0x%x issued\n", pkt->cmdString(), 275 pkt->getAddr()); 276 return true; 277 } 278 279 if (pkt->cmd != MemCmd::MemFenceReq) { 280 DPRINTF(RubyPort, 281 "Request for address %#x did not issued because %s\n", 282 pkt->getAddr(), RequestStatus_to_string(requestStatus)); 283 } 284 285 addToRetryList(); 286 287 return false; 288} 289 290void 291RubyPort::MemSlavePort::addToRetryList() 292{ 293 RubyPort *ruby_port = static_cast<RubyPort *>(&owner); 294 295 // 296 // Unless the requestor do not want retries (e.g., the Ruby tester), 297 // record the stalled M5 port for later retry when the sequencer 298 // becomes free. 299 // 300 if (!no_retry_on_stall && !ruby_port->onRetryList(this)) { 301 ruby_port->addToRetryList(this); 302 } 303} 304 305void 306RubyPort::MemSlavePort::recvFunctional(PacketPtr pkt) 307{ 308 DPRINTF(RubyPort, "Functional access for address: %#x\n", pkt->getAddr()); 309 310 RubyPort *rp M5_VAR_USED = static_cast<RubyPort *>(&owner); 311 RubySystem *rs = rp->m_ruby_system; 312 313 // Check for pio requests and directly send them to the dedicated 314 // pio port. 315 if (!isPhysMemAddress(pkt->getAddr())) { 316 DPRINTF(RubyPort, "Pio Request for address: 0x%#x\n", pkt->getAddr()); 317 assert(rp->pioMasterPort.isConnected()); 318 rp->pioMasterPort.sendFunctional(pkt); 319 return; 320 } 321 322 assert(pkt->getAddr() + pkt->getSize() <= 323 makeLineAddress(pkt->getAddr()) + RubySystem::getBlockSizeBytes()); 324 325 if (access_backing_store) { 326 // The attached physmem contains the official version of data. 327 // The following command performs the real functional access. 328 // This line should be removed once Ruby supplies the official version 329 // of data. 330 rs->getPhysMem()->functionalAccess(pkt); 331 } else { 332 bool accessSucceeded = false; 333 bool needsResponse = pkt->needsResponse(); 334 335 // Do the functional access on ruby memory 336 if (pkt->isRead()) { 337 accessSucceeded = rs->functionalRead(pkt); 338 } else if (pkt->isWrite()) { 339 accessSucceeded = rs->functionalWrite(pkt); 340 } else { 341 panic("Unsupported functional command %s\n", pkt->cmdString()); 342 } 343 344 // Unless the requester explicitly said otherwise, generate an error if 345 // the functional request failed 346 if (!accessSucceeded && !pkt->suppressFuncError()) { 347 fatal("Ruby functional %s failed for address %#x\n", 348 pkt->isWrite() ? "write" : "read", pkt->getAddr()); 349 } 350 351 // turn packet around to go back to requester if response expected 352 if (needsResponse) { 353 pkt->setFunctionalResponseStatus(accessSucceeded); 354 } 355 356 DPRINTF(RubyPort, "Functional access %s!\n", 357 accessSucceeded ? "successful":"failed"); 358 } 359} 360 361void 362RubyPort::ruby_hit_callback(PacketPtr pkt) 363{ 364 DPRINTF(RubyPort, "Hit callback for %s 0x%x\n", pkt->cmdString(), 365 pkt->getAddr()); 366 367 // The packet was destined for memory and has not yet been turned 368 // into a response 369 assert(system->isMemAddr(pkt->getAddr())); 370 assert(pkt->isRequest()); 371 372 // First we must retrieve the request port from the sender State 373 RubyPort::SenderState *senderState = 374 safe_cast<RubyPort::SenderState *>(pkt->popSenderState()); 375 MemSlavePort *port = senderState->port; 376 assert(port != NULL); 377 delete senderState; 378 379 port->hitCallback(pkt); 380 381 trySendRetries(); 382} 383 384void 385RubyPort::trySendRetries() 386{ 387 // 388 // If we had to stall the MemSlavePorts, wake them up because the sequencer 389 // likely has free resources now. 390 // 391 if (!retryList.empty()) { 392 // Record the current list of ports to retry on a temporary list 393 // before calling sendRetryReq on those ports. sendRetryReq will cause 394 // an immediate retry, which may result in the ports being put back on 395 // the list. Therefore we want to clear the retryList before calling 396 // sendRetryReq. 397 std::vector<MemSlavePort *> curRetryList(retryList); 398 399 retryList.clear(); 400 401 for (auto i = curRetryList.begin(); i != curRetryList.end(); ++i) { 402 DPRINTF(RubyPort, 403 "Sequencer may now be free. SendRetry to port %s\n", 404 (*i)->name()); 405 (*i)->sendRetryReq(); 406 } 407 } 408} 409 410void 411RubyPort::testDrainComplete() 412{ 413 //If we weren't able to drain before, we might be able to now. 414 if (drainState() == DrainState::Draining) { 415 unsigned int drainCount = outstandingCount(); 416 DPRINTF(Drain, "Drain count: %u\n", drainCount); 417 if (drainCount == 0) { 418 DPRINTF(Drain, "RubyPort done draining, signaling drain done\n"); 419 signalDrainDone(); 420 } 421 } 422} 423 424DrainState 425RubyPort::drain() 426{ 427 if (isDeadlockEventScheduled()) { 428 descheduleDeadlockEvent(); 429 } 430 431 // 432 // If the RubyPort is not empty, then it needs to clear all outstanding 433 // requests before it should call signalDrainDone() 434 // 435 DPRINTF(Config, "outstanding count %d\n", outstandingCount()); 436 if (outstandingCount() > 0) { 437 DPRINTF(Drain, "RubyPort not drained\n"); 438 return DrainState::Draining; 439 } else { 440 return DrainState::Drained; 441 } 442} 443 444void 445RubyPort::MemSlavePort::hitCallback(PacketPtr pkt) 446{ 447 bool needsResponse = pkt->needsResponse(); 448 449 // Unless specified at configuraiton, all responses except failed SC 450 // and Flush operations access M5 physical memory. 451 bool accessPhysMem = access_backing_store; 452 453 if (pkt->isLLSC()) { 454 if (pkt->isWrite()) { 455 if (pkt->req->getExtraData() != 0) { 456 // 457 // Successful SC packets convert to normal writes 458 // 459 pkt->convertScToWrite(); 460 } else { 461 // 462 // Failed SC packets don't access physical memory and thus 463 // the RubyPort itself must convert it to a response. 464 // 465 accessPhysMem = false; 466 } 467 } else { 468 // 469 // All LL packets convert to normal loads so that M5 PhysMem does 470 // not lock the blocks. 471 // 472 pkt->convertLlToRead(); 473 } 474 } 475 476 // Flush, acquire, release requests don't access physical memory 477 if (pkt->isFlush() || pkt->cmd == MemCmd::MemFenceReq) { 478 accessPhysMem = false; 479 } 480 481 if (pkt->req->isKernel()) { 482 accessPhysMem = false; 483 needsResponse = true; 484 } 485 486 DPRINTF(RubyPort, "Hit callback needs response %d\n", needsResponse); 487 488 RubyPort *ruby_port = static_cast<RubyPort *>(&owner); 489 RubySystem *rs = ruby_port->m_ruby_system; 490 if (accessPhysMem) { 491 rs->getPhysMem()->access(pkt); 492 } else if (needsResponse) { 493 pkt->makeResponse(); 494 } 495 496 // turn packet around to go back to requester if response expected 497 if (needsResponse) { 498 DPRINTF(RubyPort, "Sending packet back over port\n"); 499 // Send a response in the same cycle. There is no need to delay the 500 // response because the response latency is already incurred in the 501 // Ruby protocol. 502 schedTimingResp(pkt, curTick()); 503 } else { 504 delete pkt; 505 } 506 507 DPRINTF(RubyPort, "Hit callback done!\n"); 508} 509 510AddrRangeList 511RubyPort::PioSlavePort::getAddrRanges() const 512{ 513 // at the moment the assumption is that the master does not care 514 AddrRangeList ranges; 515 RubyPort *ruby_port = static_cast<RubyPort *>(&owner); 516 517 for (size_t i = 0; i < ruby_port->master_ports.size(); ++i) { 518 ranges.splice(ranges.begin(), 519 ruby_port->master_ports[i]->getAddrRanges()); 520 } 521 for (const auto M5_VAR_USED &r : ranges) 522 DPRINTF(RubyPort, "%s\n", r.to_string()); 523 return ranges; 524} 525 526bool 527RubyPort::MemSlavePort::isPhysMemAddress(Addr addr) const 528{ 529 RubyPort *ruby_port = static_cast<RubyPort *>(&owner); 530 return ruby_port->system->isMemAddr(addr); 531} 532 533void 534RubyPort::ruby_eviction_callback(Addr address) 535{ 536 DPRINTF(RubyPort, "Sending invalidations.\n"); 537 // Allocate the invalidate request and packet on the stack, as it is 538 // assumed they will not be modified or deleted by receivers. 539 // TODO: should this really be using funcMasterId? 540 Request request(address, RubySystem::getBlockSizeBytes(), 0, 541 Request::funcMasterId); 542 // Use a single packet to signal all snooping ports of the invalidation. 543 // This assumes that snooping ports do NOT modify the packet/request 544 Packet pkt(&request, MemCmd::InvalidateReq); 545 for (CpuPortIter p = slave_ports.begin(); p != slave_ports.end(); ++p) { 546 // check if the connected master port is snooping 547 if ((*p)->isSnooping()) { 548 // send as a snoop request 549 (*p)->sendTimingSnoopReq(&pkt); 550 } 551 } 552} 553 554void 555RubyPort::PioMasterPort::recvRangeChange() 556{ 557 RubyPort &r = static_cast<RubyPort &>(owner); 558 r.gotAddrRanges--; 559 if (r.gotAddrRanges == 0 && FullSystem) { 560 r.pioSlavePort.sendRangeChange(); 561 } 562} 563