AbstractController.hh revision 10523
1545SN/A/* 21762SN/A * Copyright (c) 2009 Mark D. Hill and David A. Wood 3545SN/A * All rights reserved. 4545SN/A * 5545SN/A * Redistribution and use in source and binary forms, with or without 6545SN/A * modification, are permitted provided that the following conditions are 7545SN/A * met: redistributions of source code must retain the above copyright 8545SN/A * notice, this list of conditions and the following disclaimer; 9545SN/A * redistributions in binary form must reproduce the above copyright 10545SN/A * notice, this list of conditions and the following disclaimer in the 11545SN/A * documentation and/or other materials provided with the distribution; 12545SN/A * neither the name of the copyright holders nor the names of its 13545SN/A * contributors may be used to endorse or promote products derived from 14545SN/A * this software without specific prior written permission. 15545SN/A * 16545SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17545SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18545SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19545SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20545SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21545SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22545SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23545SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24545SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25545SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26545SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu */ 282665Ssaidi@eecs.umich.edu 292665Ssaidi@eecs.umich.edu#ifndef __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCONTROLLER_HH__ 30545SN/A#define __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCONTROLLER_HH__ 31545SN/A 321310SN/A#include <iostream> 331310SN/A#include <string> 34545SN/A 355386Sstever@gmail.com#include "base/callback.hh" 362542SN/A#include "mem/protocol/AccessPermission.hh" 373348Sbinkertn@umich.edu#include "mem/ruby/common/Address.hh" 383348Sbinkertn@umich.edu#include "mem/ruby/common/Consumer.hh" 394762Snate@binkert.org#include "mem/ruby/common/DataBlock.hh" 404762Snate@binkert.org#include "mem/ruby/common/Histogram.hh" 414762Snate@binkert.org#include "mem/ruby/common/MachineID.hh" 422489SN/A#include "mem/ruby/network/MessageBuffer.hh" 43545SN/A#include "mem/ruby/network/Network.hh" 443090Sstever@eecs.umich.edu#include "mem/ruby/system/CacheRecorder.hh" 452384SN/A#include "mem/packet.hh" 462489SN/A#include "params/RubyController.hh" 472522SN/A#include "sim/clocked_object.hh" 48545SN/A 492489SN/Aclass Network; 502489SN/A 512489SN/Aclass AbstractController : public ClockedObject, public Consumer 522489SN/A{ 538711Sandreas.hansson@arm.com public: 543090Sstever@eecs.umich.edu typedef RubyControllerParams Params; 553090Sstever@eecs.umich.edu AbstractController(const Params *p); 562914Ssaidi@eecs.umich.edu void init(); 57545SN/A const Params *params() const { return (const Params *)_params; } 58545SN/A 592489SN/A const NodeID getVersion() const { return m_machineID.getNum(); } 602384SN/A const MachineType getType() const { return m_machineID.getType(); } 612384SN/A 623349Sbinkertn@umich.edu void initNetworkPtr(Network* net_ptr) { m_net_ptr = net_ptr; } 632384SN/A 648711Sandreas.hansson@arm.com // return instance name 652384SN/A void blockOnQueue(Address, MessageBuffer*); 662384SN/A void unblock(Address); 673091Sstever@eecs.umich.edu 688914Sandreas.hansson@arm.com virtual MessageBuffer* getMandatoryQueue() const = 0; 692384SN/A virtual AccessPermission getAccessPermission(const Address& addr) = 0; 702384SN/A 712565SN/A virtual void print(std::ostream & out) const = 0; 728922Swilliam.wang@arm.com virtual void wakeup() = 0; 732384SN/A virtual void resetStats() = 0; 742384SN/A virtual void regStats(); 755386Sstever@gmail.com 762784Ssaidi@eecs.umich.edu virtual void recordCacheTrace(int cntrl, CacheRecorder* tr) = 0; 772784Ssaidi@eecs.umich.edu virtual Sequencer* getSequencer() const = 0; 782784Ssaidi@eecs.umich.edu 792784Ssaidi@eecs.umich.edu //! These functions are used by ruby system to read/write the data blocks 802784Ssaidi@eecs.umich.edu //! that exist with in the controller. 812784Ssaidi@eecs.umich.edu virtual void functionalRead(const Address &addr, PacketPtr) = 0; 822784Ssaidi@eecs.umich.edu //! The return value indicates the number of messages written with the 832784Ssaidi@eecs.umich.edu //! data from the packet. 842784Ssaidi@eecs.umich.edu virtual uint32_t functionalWriteBuffers(PacketPtr&) = 0; 852784Ssaidi@eecs.umich.edu virtual int functionalWrite(const Address &addr, PacketPtr) = 0; 862784Ssaidi@eecs.umich.edu 872784Ssaidi@eecs.umich.edu //! Function for enqueuing a prefetch request 882784Ssaidi@eecs.umich.edu virtual void enqueuePrefetch(const Address&, const RubyRequestType&) 892784Ssaidi@eecs.umich.edu { fatal("Prefetches not implemented!");} 905534Ssaidi@eecs.umich.edu 915534Ssaidi@eecs.umich.edu //! Function for collating statistics from all the controllers of this 925534Ssaidi@eecs.umich.edu //! particular type. This function should only be called from the 937403SAli.Saidi@ARM.com //! version 0 of this controller type. 945534Ssaidi@eecs.umich.edu virtual void collateStats() 955534Ssaidi@eecs.umich.edu {fatal("collateStats() should be overridden!");} 965534Ssaidi@eecs.umich.edu 972784Ssaidi@eecs.umich.edu //! Set the message buffer with given name. 982784Ssaidi@eecs.umich.edu virtual void setNetQueue(const std::string& name, MessageBuffer *b) = 0; 992784Ssaidi@eecs.umich.edu 1007403SAli.Saidi@ARM.com public: 1013349Sbinkertn@umich.edu MachineID getMachineID() const { return m_machineID; } 1022384SN/A 1032901Ssaidi@eecs.umich.edu Stats::Histogram& getDelayHist() { return m_delayHistogram; } 1042565SN/A Stats::Histogram& getDelayVCHist(uint32_t index) 1052901Ssaidi@eecs.umich.edu { return *(m_delayVCHistogram[index]); } 1062565SN/A 1078832SAli.Saidi@ARM.com protected: 1088832SAli.Saidi@ARM.com //! Profiles original cache requests including PUTs 1098832SAli.Saidi@ARM.com void profileRequest(const std::string &request); 1102565SN/A //! Profiles the delay associated with messages. 1112565SN/A void profileMsgDelay(uint32_t virtualNetwork, Cycles delay); 1122384SN/A 1132901Ssaidi@eecs.umich.edu void stallBuffer(MessageBuffer* buf, Address addr); 1142901Ssaidi@eecs.umich.edu void wakeUpBuffers(Address addr); 1152901Ssaidi@eecs.umich.edu void wakeUpAllBuffers(Address addr); 1162901Ssaidi@eecs.umich.edu void wakeUpAllBuffers(); 1172901Ssaidi@eecs.umich.edu 1182901Ssaidi@eecs.umich.edu protected: 1192901Ssaidi@eecs.umich.edu NodeID m_version; 1204435Ssaidi@eecs.umich.edu MachineID m_machineID; 1214435Ssaidi@eecs.umich.edu NodeID m_clusterID; 1224435Ssaidi@eecs.umich.edu 1234435Ssaidi@eecs.umich.edu Network* m_net_ptr; 1247403SAli.Saidi@ARM.com bool m_is_blocking; 1257403SAli.Saidi@ARM.com std::map<Address, MessageBuffer*> m_block_map; 1267403SAli.Saidi@ARM.com 1277403SAli.Saidi@ARM.com typedef std::vector<MessageBuffer*> MsgVecType; 1287403SAli.Saidi@ARM.com typedef std::map< Address, MsgVecType* > WaitingBufType; 1297403SAli.Saidi@ARM.com WaitingBufType m_waiting_buffers; 1304435Ssaidi@eecs.umich.edu 1314435Ssaidi@eecs.umich.edu unsigned int m_in_ports; 1324435Ssaidi@eecs.umich.edu unsigned int m_cur_in_port; 1334435Ssaidi@eecs.umich.edu int m_number_of_TBEs; 1348630SMitchell.Hayenga@ARM.com int m_transitions_per_cycle; 1358630SMitchell.Hayenga@ARM.com unsigned int m_buffer_size; 1368630SMitchell.Hayenga@ARM.com Cycles m_recycle_latency; 1373349Sbinkertn@umich.edu 1383349Sbinkertn@umich.edu //! Counter for the number of cycles when the transitions carried out 1398630SMitchell.Hayenga@ARM.com //! were equal to the maximum allowed 1408630SMitchell.Hayenga@ARM.com Stats::Scalar m_fully_busy_cycles; 1418630SMitchell.Hayenga@ARM.com 1428630SMitchell.Hayenga@ARM.com //! Histogram for profiling delay for the messages this controller 1438630SMitchell.Hayenga@ARM.com //! cares for 1443349Sbinkertn@umich.edu Stats::Histogram m_delayHistogram; 1458630SMitchell.Hayenga@ARM.com std::vector<Stats::Histogram *> m_delayVCHistogram; 1468630SMitchell.Hayenga@ARM.com 1478630SMitchell.Hayenga@ARM.com //! Callback class used for collating statistics from all the 1488630SMitchell.Hayenga@ARM.com //! controller of this type. 1498630SMitchell.Hayenga@ARM.com class StatsCallback : public Callback 1502384SN/A { 1512657Ssaidi@eecs.umich.edu private: 1522384SN/A AbstractController *ctr; 1538922Swilliam.wang@arm.com 1542384SN/A public: 1554435Ssaidi@eecs.umich.edu virtual ~StatsCallback() {} 1564435Ssaidi@eecs.umich.edu StatsCallback(AbstractController *_ctr) : ctr(_ctr) {} 1574435Ssaidi@eecs.umich.edu void process() {ctr->collateStats();} 1584435Ssaidi@eecs.umich.edu }; 1594435Ssaidi@eecs.umich.edu}; 1602489SN/A 1612384SN/A#endif // __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCONTROLLER_HH__ 1628630SMitchell.Hayenga@ARM.com