AbstractController.hh revision 9596
16899SN/A/* 28851Sandreas.hansson@arm.com * Copyright (c) 2009 Mark D. Hill and David A. Wood 38851Sandreas.hansson@arm.com * All rights reserved. 48851Sandreas.hansson@arm.com * 58851Sandreas.hansson@arm.com * Redistribution and use in source and binary forms, with or without 68851Sandreas.hansson@arm.com * modification, are permitted provided that the following conditions are 78851Sandreas.hansson@arm.com * met: redistributions of source code must retain the above copyright 88851Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer; 98851Sandreas.hansson@arm.com * redistributions in binary form must reproduce the above copyright 108851Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer in the 118851Sandreas.hansson@arm.com * documentation and/or other materials provided with the distribution; 128851Sandreas.hansson@arm.com * neither the name of the copyright holders nor the names of its 138851Sandreas.hansson@arm.com * contributors may be used to endorse or promote products derived from 146899SN/A * this software without specific prior written permission. 157553SN/A * 166899SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176899SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186899SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196899SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206899SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216899SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226899SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236899SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246899SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256899SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266899SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276899SN/A */ 286899SN/A 296899SN/A#ifndef __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCONTROLLER_HH__ 306899SN/A#define __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCONTROLLER_HH__ 316899SN/A 326899SN/A#include <iostream> 336899SN/A#include <string> 346899SN/A 356899SN/A#include "mem/protocol/AccessPermission.hh" 366899SN/A#include "mem/ruby/buffers/MessageBuffer.hh" 376899SN/A#include "mem/ruby/common/Address.hh" 386899SN/A#include "mem/ruby/common/Consumer.hh" 396899SN/A#include "mem/ruby/common/DataBlock.hh" 406899SN/A#include "mem/ruby/common/Histogram.hh" 416899SN/A#include "mem/ruby/network/Network.hh" 427632SBrad.Beckmann@amd.com#include "mem/ruby/recorder/CacheRecorder.hh" 437632SBrad.Beckmann@amd.com#include "mem/ruby/system/MachineID.hh" 448232Snate@binkert.org#include "mem/packet.hh" 457053SN/A#include "params/RubyController.hh" 466899SN/A#include "sim/clocked_object.hh" 476899SN/A 487553SN/Aclass Network; 497553SN/A 507553SN/Aclass AbstractController : public ClockedObject, public Consumer 517553SN/A{ 526899SN/A public: 537553SN/A typedef RubyControllerParams Params; 546899SN/A AbstractController(const Params *p); 558851Sandreas.hansson@arm.com void init(); 568851Sandreas.hansson@arm.com const Params *params() const { return (const Params *)_params; } 578851Sandreas.hansson@arm.com virtual MessageBuffer* getMandatoryQueue() const = 0; 588851Sandreas.hansson@arm.com virtual const int & getVersion() const = 0; 598851Sandreas.hansson@arm.com virtual const std::string toString() const = 0; // returns text version of 608851Sandreas.hansson@arm.com // controller type 617053SN/A virtual const std::string getName() const = 0; // return instance name 627553SN/A virtual void blockOnQueue(Address, MessageBuffer*) = 0; 636899SN/A virtual void unblock(Address) = 0; 646899SN/A virtual void initNetworkPtr(Network* net_ptr) = 0; 657553SN/A virtual AccessPermission getAccessPermission(const Address& addr) = 0; 666899SN/A virtual DataBlock& getDataBlock(const Address& addr) = 0; 677053SN/A 687053SN/A virtual void print(std::ostream & out) const = 0; 696899SN/A virtual void printStats(std::ostream & out) const = 0; 706899SN/A virtual void wakeup() = 0; 717053SN/A // virtual void dumpStats(std::ostream & out) = 0; 727553SN/A virtual void clearStats() = 0; 736899SN/A virtual void recordCacheTrace(int cntrl, CacheRecorder* tr) = 0; 747053SN/A virtual Sequencer* getSequencer() const = 0; 757553SN/A 766899SN/A //! These functions are used by ruby system to read/write the message 776899SN/A //! queues that exist with in the controller. 788922Swilliam.wang@arm.com //! The boolean return value indicates if the read was performed 798922Swilliam.wang@arm.com //! successfully. 806899SN/A virtual bool functionalReadBuffers(PacketPtr&) = 0; 816899SN/A //! The return value indicates the number of messages written with the 828922Swilliam.wang@arm.com //! data from the packet. 838922Swilliam.wang@arm.com virtual uint32_t functionalWriteBuffers(PacketPtr&) = 0; 848922Swilliam.wang@arm.com 858922Swilliam.wang@arm.com //! Function for enqueuing a prefetch request 868922Swilliam.wang@arm.com virtual void enqueuePrefetch(const Address&, const RubyRequestType&) 878922Swilliam.wang@arm.com { fatal("Prefetches not implemented!");} 888922Swilliam.wang@arm.com 898922Swilliam.wang@arm.com public: 906899SN/A MachineID getMachineID() const { return m_machineID; } 916899SN/A uint64_t getFullyBusyCycles() const { return m_fully_busy_cycles; } 926899SN/A uint64_t getRequestCount() const { return m_request_count; } 936899SN/A const std::map<std::string, uint64_t>& getRequestProfileMap() const 948975Sandreas.hansson@arm.com { return m_requestProfileMap; } 956899SN/A 968965Sandreas.hansson@arm.com Histogram& getDelayHist() { return m_delayHistogram; } 977553SN/A Histogram& getDelayVCHist(uint32_t index) 987553SN/A { return m_delayVCHistogram[index]; } 997553SN/A 1007553SN/A MessageBuffer *getPeerQueue(uint32_t pid) 1017053SN/A { 1027053SN/A std::map<uint32_t, MessageBuffer *>::iterator it = 1037053SN/A peerQueueMap.find(pid); 1046899SN/A assert(it != peerQueueMap.end()); 1056899SN/A return (*it).second; 1068922Swilliam.wang@arm.com } 1077553SN/A 1086899SN/A protected: 1097053SN/A //! Profiles original cache requests including PUTs 1106899SN/A void profileRequest(const std::string &request); 1117053SN/A //! Profiles the delay associated with messages. 1126899SN/A void profileMsgDelay(uint32_t virtualNetwork, Cycles delay); 1136899SN/A 1147053SN/A //! Function for connecting peer controllers 1157553SN/A void connectWithPeer(AbstractController *); 1166899SN/A virtual void getQueuesFromPeer(AbstractController *) 1177553SN/A { fatal("getQueuesFromPeer() should be called only if implemented!"); } 1187553SN/A 1197553SN/A void stallBuffer(MessageBuffer* buf, Address addr); 1207553SN/A void wakeUpBuffers(Address addr); 1216899SN/A void wakeUpAllBuffers(Address addr); 1227553SN/A void wakeUpAllBuffers(); 1237823Ssteve.reinhardt@amd.com 1246899SN/A protected: 1256899SN/A int m_transitions_per_cycle; 1267053SN/A int m_buffer_size; 1277553SN/A Cycles m_recycle_latency; 1287053SN/A std::string m_name; 1297553SN/A NodeID m_version; 1307553SN/A Network* m_net_ptr; 1317823Ssteve.reinhardt@amd.com MachineID m_machineID; 1327553SN/A bool m_is_blocking; 1337053SN/A std::map<Address, MessageBuffer*> m_block_map; 1347553SN/A typedef std::vector<MessageBuffer*> MsgVecType; 1357053SN/A typedef std::map< Address, MsgVecType* > WaitingBufType; 1366899SN/A WaitingBufType m_waiting_buffers; 1376899SN/A int m_max_in_port_rank; 1387553SN/A int m_cur_in_port_rank; 1397553SN/A int m_number_of_TBEs; 1406899SN/A 1417553SN/A //! Map from physical network number to the Message Buffer. 1426899SN/A std::map<uint32_t, MessageBuffer*> peerQueueMap; 143 144 //! Counter for the number of cycles when the transitions carried out 145 //! were equal to the maximum allowed 146 uint64_t m_fully_busy_cycles; 147 148 //! Map for couting requests of different types. The controller should 149 //! call requisite function for updating the count. 150 std::map<std::string, uint64_t> m_requestProfileMap; 151 uint64_t m_request_count; 152 153 //! Histogram for profiling delay for the messages this controller 154 //! cares for 155 Histogram m_delayHistogram; 156 std::vector<Histogram> m_delayVCHistogram; 157}; 158 159#endif // __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCONTROLLER_HH__ 160