Topology.cc revision 13661
16145SN/A/* 26145SN/A * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 36145SN/A * All rights reserved. 46145SN/A * 56145SN/A * Redistribution and use in source and binary forms, with or without 66145SN/A * modification, are permitted provided that the following conditions are 76145SN/A * met: redistributions of source code must retain the above copyright 86145SN/A * notice, this list of conditions and the following disclaimer; 96145SN/A * redistributions in binary form must reproduce the above copyright 106145SN/A * notice, this list of conditions and the following disclaimer in the 116145SN/A * documentation and/or other materials provided with the distribution; 126145SN/A * neither the name of the copyright holders nor the names of its 136145SN/A * contributors may be used to endorse or promote products derived from 146145SN/A * this software without specific prior written permission. 156145SN/A * 166145SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176145SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186145SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196145SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206145SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216145SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226145SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236145SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246145SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256145SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266145SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276145SN/A */ 286145SN/A 2911793Sbrandon.potter@amd.com#include "mem/ruby/network/Topology.hh" 3011793Sbrandon.potter@amd.com 317832SN/A#include <cassert> 327832SN/A 339356Snilay@cs.wisc.edu#include "base/trace.hh" 348232SN/A#include "debug/RubyNetwork.hh" 357054SN/A#include "mem/ruby/common/NetDest.hh" 368257SBrad.Beckmann@amd.com#include "mem/ruby/network/BasicLink.hh" 3711793Sbrandon.potter@amd.com#include "mem/ruby/network/Network.hh" 387054SN/A#include "mem/ruby/slicc_interface/AbstractController.hh" 396145SN/A 407055SN/Ausing namespace std; 417055SN/A 427054SN/Aconst int INFINITE_LATENCY = 10000; // Yes, this is a big hack 438257SBrad.Beckmann@amd.com 446145SN/A// Note: In this file, we use the first 2*m_nodes SwitchIDs to 456145SN/A// represent the input and output endpoint links. These really are 466145SN/A// not 'switches', as they will not have a Switch object allocated for 476145SN/A// them. The first m_nodes SwitchIDs are the links into the network, 486145SN/A// the second m_nodes set of SwitchIDs represent the the output queues 496145SN/A// of the network. 506145SN/A 5111096Snilay@cs.wisc.eduTopology::Topology(uint32_t num_routers, 5211096Snilay@cs.wisc.edu const vector<BasicExtLink *> &ext_links, 5311096Snilay@cs.wisc.edu const vector<BasicIntLink *> &int_links) 5413661Spfotouhi@ucdavis.edu : m_nodes(MachineType_base_number(MachineType_NUM)), 5513661Spfotouhi@ucdavis.edu m_number_of_switches(num_routers), 5611096Snilay@cs.wisc.edu m_ext_link_vector(ext_links), m_int_link_vector(int_links) 576145SN/A{ 586881SN/A // Total nodes/controllers in network 596881SN/A assert(m_nodes > 1); 606285SN/A 6111663Stushar@ece.gatech.edu // analyze both the internal and external links, create data structures. 6211663Stushar@ece.gatech.edu // The python created external links are bi-directional, 6311663Stushar@ece.gatech.edu // and the python created internal links are uni-directional. 6411663Stushar@ece.gatech.edu // The networks and topology utilize uni-directional links. 6511663Stushar@ece.gatech.edu // Thus each external link is converted to two calls to addLink, 6611663Stushar@ece.gatech.edu // one for each direction. 6711663Stushar@ece.gatech.edu // 6811663Stushar@ece.gatech.edu // External Links 699594Snilay@cs.wisc.edu for (vector<BasicExtLink*>::const_iterator i = ext_links.begin(); 709594Snilay@cs.wisc.edu i != ext_links.end(); ++i) { 718257SBrad.Beckmann@amd.com BasicExtLink *ext_link = (*i); 728257SBrad.Beckmann@amd.com AbstractController *abs_cntrl = ext_link->params()->ext_node; 738257SBrad.Beckmann@amd.com BasicRouter *router = ext_link->params()->int_node; 746881SN/A 7510078Snilay@cs.wisc.edu int machine_base_idx = MachineType_base_number(abs_cntrl->getType()); 769869Sjthestness@gmail.com int ext_idx1 = machine_base_idx + abs_cntrl->getVersion(); 777054SN/A int ext_idx2 = ext_idx1 + m_nodes; 788257SBrad.Beckmann@amd.com int int_idx = router->params()->router_id + 2*m_nodes; 796145SN/A 808257SBrad.Beckmann@amd.com // create the internal uni-directional links in both directions 8111663Stushar@ece.gatech.edu // ext to int 8211663Stushar@ece.gatech.edu addLink(ext_idx1, int_idx, ext_link); 8311663Stushar@ece.gatech.edu // int to ext 8411663Stushar@ece.gatech.edu addLink(int_idx, ext_idx2, ext_link); 857054SN/A } 866145SN/A 8711663Stushar@ece.gatech.edu // Internal Links 889594Snilay@cs.wisc.edu for (vector<BasicIntLink*>::const_iterator i = int_links.begin(); 899594Snilay@cs.wisc.edu i != int_links.end(); ++i) { 908257SBrad.Beckmann@amd.com BasicIntLink *int_link = (*i); 9111663Stushar@ece.gatech.edu BasicRouter *router_src = int_link->params()->src_node; 9211663Stushar@ece.gatech.edu BasicRouter *router_dst = int_link->params()->dst_node; 936881SN/A 9411664Stushar@ece.gatech.edu PortDirection src_outport = int_link->params()->src_outport; 9511664Stushar@ece.gatech.edu PortDirection dst_inport = int_link->params()->dst_inport; 9611664Stushar@ece.gatech.edu 978257SBrad.Beckmann@amd.com // Store the IntLink pointers for later 988257SBrad.Beckmann@amd.com m_int_link_vector.push_back(int_link); 998257SBrad.Beckmann@amd.com 10011663Stushar@ece.gatech.edu int src = router_src->params()->router_id + 2*m_nodes; 10111663Stushar@ece.gatech.edu int dst = router_dst->params()->router_id + 2*m_nodes; 1028257SBrad.Beckmann@amd.com 10311663Stushar@ece.gatech.edu // create the internal uni-directional link from src to dst 10411664Stushar@ece.gatech.edu addLink(src, dst, int_link, src_outport, dst_inport); 1057054SN/A } 1066145SN/A} 1076145SN/A 1088257SBrad.Beckmann@amd.comvoid 1099799Snilay@cs.wisc.eduTopology::createLinks(Network *net) 1107054SN/A{ 1117054SN/A // Find maximum switchID 1127054SN/A SwitchID max_switch_id = 0; 1138257SBrad.Beckmann@amd.com for (LinkMap::const_iterator i = m_link_map.begin(); 1148257SBrad.Beckmann@amd.com i != m_link_map.end(); ++i) { 11510005Snilay@cs.wisc.edu std::pair<SwitchID, SwitchID> src_dest = (*i).first; 1168257SBrad.Beckmann@amd.com max_switch_id = max(max_switch_id, src_dest.first); 11711320Ssteve.reinhardt@amd.com max_switch_id = max(max_switch_id, src_dest.second); 1187054SN/A } 1196881SN/A 1208257SBrad.Beckmann@amd.com // Initialize weight, latency, and inter switched vectors 1217054SN/A int num_switches = max_switch_id+1; 12211096Snilay@cs.wisc.edu Matrix topology_weights(num_switches, 12311096Snilay@cs.wisc.edu vector<int>(num_switches, INFINITE_LATENCY)); 12411096Snilay@cs.wisc.edu Matrix component_latencies(num_switches, 12511096Snilay@cs.wisc.edu vector<int>(num_switches, -1)); 12611096Snilay@cs.wisc.edu Matrix component_inter_switches(num_switches, 12711096Snilay@cs.wisc.edu vector<int>(num_switches, 0)); 1286145SN/A 1297054SN/A // Set identity weights to zero 1307054SN/A for (int i = 0; i < topology_weights.size(); i++) { 1317054SN/A topology_weights[i][i] = 0; 1327054SN/A } 1336145SN/A 1347054SN/A // Fill in the topology weights and bandwidth multipliers 1358257SBrad.Beckmann@amd.com for (LinkMap::const_iterator i = m_link_map.begin(); 1368257SBrad.Beckmann@amd.com i != m_link_map.end(); ++i) { 1378257SBrad.Beckmann@amd.com std::pair<int, int> src_dest = (*i).first; 1388257SBrad.Beckmann@amd.com BasicLink* link = (*i).second.link; 1398257SBrad.Beckmann@amd.com int src = src_dest.first; 1408257SBrad.Beckmann@amd.com int dst = src_dest.second; 14111096Snilay@cs.wisc.edu component_latencies[src][dst] = link->m_latency; 1428257SBrad.Beckmann@amd.com topology_weights[src][dst] = link->m_weight; 1437054SN/A } 14411320Ssteve.reinhardt@amd.com 1457054SN/A // Walk topology and hookup the links 14611096Snilay@cs.wisc.edu Matrix dist = shortest_path(topology_weights, component_latencies, 14711096Snilay@cs.wisc.edu component_inter_switches); 14811096Snilay@cs.wisc.edu 1497054SN/A for (int i = 0; i < topology_weights.size(); i++) { 1507054SN/A for (int j = 0; j < topology_weights[i].size(); j++) { 1517054SN/A int weight = topology_weights[i][j]; 1527054SN/A if (weight > 0 && weight != INFINITE_LATENCY) { 1539799Snilay@cs.wisc.edu NetDest destination_set = 1549799Snilay@cs.wisc.edu shortest_path_to_node(i, j, topology_weights, dist); 1559799Snilay@cs.wisc.edu makeLink(net, i, j, destination_set); 1567054SN/A } 1577054SN/A } 1586895SN/A } 1596895SN/A} 1606895SN/A 1617054SN/Avoid 16211664Stushar@ece.gatech.eduTopology::addLink(SwitchID src, SwitchID dest, BasicLink* link, 16311664Stushar@ece.gatech.edu PortDirection src_outport_dirn, 16411664Stushar@ece.gatech.edu PortDirection dst_inport_dirn) 1657054SN/A{ 1667832SN/A assert(src <= m_number_of_switches+m_nodes+m_nodes); 1677832SN/A assert(dest <= m_number_of_switches+m_nodes+m_nodes); 16811320Ssteve.reinhardt@amd.com 1698257SBrad.Beckmann@amd.com std::pair<int, int> src_dest_pair; 1708257SBrad.Beckmann@amd.com LinkEntry link_entry; 1718257SBrad.Beckmann@amd.com 1728257SBrad.Beckmann@amd.com src_dest_pair.first = src; 1738257SBrad.Beckmann@amd.com src_dest_pair.second = dest; 1748257SBrad.Beckmann@amd.com link_entry.link = link; 17511664Stushar@ece.gatech.edu link_entry.src_outport_dirn = src_outport_dirn; 17611664Stushar@ece.gatech.edu link_entry.dst_inport_dirn = dst_inport_dirn; 1778257SBrad.Beckmann@amd.com m_link_map[src_dest_pair] = link_entry; 1787054SN/A} 1797054SN/A 1807054SN/Avoid 1817054SN/ATopology::makeLink(Network *net, SwitchID src, SwitchID dest, 1829799Snilay@cs.wisc.edu const NetDest& routing_table_entry) 1837054SN/A{ 1847054SN/A // Make sure we're not trying to connect two end-point nodes 1857054SN/A // directly together 1867054SN/A assert(src >= 2 * m_nodes || dest >= 2 * m_nodes); 1877054SN/A 1888257SBrad.Beckmann@amd.com std::pair<int, int> src_dest; 18911320Ssteve.reinhardt@amd.com LinkEntry link_entry; 1908257SBrad.Beckmann@amd.com 1917054SN/A if (src < m_nodes) { 1928257SBrad.Beckmann@amd.com src_dest.first = src; 1938257SBrad.Beckmann@amd.com src_dest.second = dest; 1948257SBrad.Beckmann@amd.com link_entry = m_link_map[src_dest]; 19511663Stushar@ece.gatech.edu net->makeExtInLink(src, dest - (2 * m_nodes), link_entry.link, 19611663Stushar@ece.gatech.edu routing_table_entry); 1977054SN/A } else if (dest < 2*m_nodes) { 1987054SN/A assert(dest >= m_nodes); 1998257SBrad.Beckmann@amd.com NodeID node = dest - m_nodes; 2008257SBrad.Beckmann@amd.com src_dest.first = src; 2018257SBrad.Beckmann@amd.com src_dest.second = dest; 2028257SBrad.Beckmann@amd.com link_entry = m_link_map[src_dest]; 20311663Stushar@ece.gatech.edu net->makeExtOutLink(src - (2 * m_nodes), node, link_entry.link, 20411663Stushar@ece.gatech.edu routing_table_entry); 2057054SN/A } else { 2068257SBrad.Beckmann@amd.com assert((src >= 2 * m_nodes) && (dest >= 2 * m_nodes)); 2078257SBrad.Beckmann@amd.com src_dest.first = src; 2088257SBrad.Beckmann@amd.com src_dest.second = dest; 2098257SBrad.Beckmann@amd.com link_entry = m_link_map[src_dest]; 2108257SBrad.Beckmann@amd.com net->makeInternalLink(src - (2 * m_nodes), dest - (2 * m_nodes), 21111663Stushar@ece.gatech.edu link_entry.link, 21211664Stushar@ece.gatech.edu routing_table_entry, 21311664Stushar@ece.gatech.edu link_entry.src_outport_dirn, 21411664Stushar@ece.gatech.edu link_entry.dst_inport_dirn); 2157054SN/A } 2167054SN/A} 2177054SN/A 2186145SN/A// The following all-pairs shortest path algorithm is based on the 2196145SN/A// discussion from Cormen et al., Chapter 26.1. 2207054SN/Avoid 22111096Snilay@cs.wisc.eduTopology::extend_shortest_path(Matrix ¤t_dist, Matrix &latencies, 22211096Snilay@cs.wisc.edu Matrix &inter_switches) 2237054SN/A{ 2247054SN/A bool change = true; 2257054SN/A int nodes = current_dist.size(); 2266145SN/A 2277054SN/A while (change) { 2287054SN/A change = false; 2297054SN/A for (int i = 0; i < nodes; i++) { 2307054SN/A for (int j = 0; j < nodes; j++) { 2317054SN/A int minimum = current_dist[i][j]; 2327054SN/A int previous_minimum = minimum; 2337054SN/A int intermediate_switch = -1; 2347054SN/A for (int k = 0; k < nodes; k++) { 2357054SN/A minimum = min(minimum, 2367054SN/A current_dist[i][k] + current_dist[k][j]); 2377054SN/A if (previous_minimum != minimum) { 2387054SN/A intermediate_switch = k; 2397054SN/A inter_switches[i][j] = 2407054SN/A inter_switches[i][k] + 2417054SN/A inter_switches[k][j] + 1; 2427054SN/A } 2437054SN/A previous_minimum = minimum; 2447054SN/A } 2457054SN/A if (current_dist[i][j] != minimum) { 2467054SN/A change = true; 2477054SN/A current_dist[i][j] = minimum; 2487054SN/A assert(intermediate_switch >= 0); 2497054SN/A assert(intermediate_switch < latencies[i].size()); 2507054SN/A latencies[i][j] = latencies[i][intermediate_switch] + 2517054SN/A latencies[intermediate_switch][j]; 2527054SN/A } 2537054SN/A } 2546145SN/A } 2556145SN/A } 2566145SN/A} 2576145SN/A 2587054SN/AMatrix 25911096Snilay@cs.wisc.eduTopology::shortest_path(const Matrix &weights, Matrix &latencies, 26011096Snilay@cs.wisc.edu Matrix &inter_switches) 2616145SN/A{ 2627054SN/A Matrix dist = weights; 2637054SN/A extend_shortest_path(dist, latencies, inter_switches); 2647054SN/A return dist; 2656145SN/A} 2666145SN/A 2677054SN/Abool 26811096Snilay@cs.wisc.eduTopology::link_is_shortest_path_to_node(SwitchID src, SwitchID next, 26911096Snilay@cs.wisc.edu SwitchID final, const Matrix &weights, 27011096Snilay@cs.wisc.edu const Matrix &dist) 2716145SN/A{ 2727054SN/A return weights[src][next] + dist[next][final] == dist[src][final]; 2736145SN/A} 2746145SN/A 2757054SN/ANetDest 27611096Snilay@cs.wisc.eduTopology::shortest_path_to_node(SwitchID src, SwitchID next, 27711096Snilay@cs.wisc.edu const Matrix &weights, const Matrix &dist) 2786145SN/A{ 2797054SN/A NetDest result; 2807054SN/A int d = 0; 2817054SN/A int machines; 2827054SN/A int max_machines; 2836145SN/A 2847054SN/A machines = MachineType_NUM; 2857054SN/A max_machines = MachineType_base_number(MachineType_NUM); 2866145SN/A 2877054SN/A for (int m = 0; m < machines; m++) { 28810005Snilay@cs.wisc.edu for (NodeID i = 0; i < MachineType_base_count((MachineType)m); i++) { 2897054SN/A // we use "d+max_machines" below since the "destination" 2907054SN/A // switches for the machines are numbered 2917054SN/A // [MachineType_base_number(MachineType_NUM)... 2927054SN/A // 2*MachineType_base_number(MachineType_NUM)-1] for the 2937054SN/A // component network 2947054SN/A if (link_is_shortest_path_to_node(src, next, d + max_machines, 2957054SN/A weights, dist)) { 2967054SN/A MachineID mach = {(MachineType)m, i}; 2977054SN/A result.add(mach); 2987054SN/A } 2997054SN/A d++; 3007054SN/A } 3016145SN/A } 3026145SN/A 3037780SN/A DPRINTF(RubyNetwork, "Returning shortest path\n" 3047780SN/A "(src-(2*max_machines)): %d, (next-(2*max_machines)): %d, " 3057780SN/A "src: %d, next: %d, result: %s\n", 3067780SN/A (src-(2*max_machines)), (next-(2*max_machines)), 3077780SN/A src, next, result); 3086145SN/A 3097054SN/A return result; 3106145SN/A} 311