request.hh revision 10029:45779e2f844b
1/* 2 * Copyright (c) 2012-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2002-2005 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Ron Dreslinski 41 * Steve Reinhardt 42 * Ali Saidi 43 */ 44 45/** 46 * @file 47 * Declaration of a request, the overall memory request consisting of 48 the parts of the request that are persistent throughout the transaction. 49 */ 50 51#ifndef __MEM_REQUEST_HH__ 52#define __MEM_REQUEST_HH__ 53 54#include <cassert> 55#include <climits> 56 57#include "base/flags.hh" 58#include "base/misc.hh" 59#include "base/types.hh" 60#include "sim/core.hh" 61 62/** 63 * Special TaskIds that are used for per-context-switch stats dumps 64 * and Cache Occupancy. Having too many tasks seems to be a problem 65 * with vector stats. 1024 seems to be a reasonable number that 66 * doesn't cause a problem with stats and is large enough to realistic 67 * benchmarks (Linux/Android boot, BBench, etc.) 68 */ 69 70namespace ContextSwitchTaskId { 71 enum TaskId { 72 MaxNormalTaskId = 1021, /* Maximum number of normal tasks */ 73 Prefetcher = 1022, /* For cache lines brought in by prefetcher */ 74 DMA = 1023, /* Mostly Table Walker */ 75 Unknown = 1024, 76 NumTaskId 77 }; 78} 79 80class Request; 81 82typedef Request* RequestPtr; 83typedef uint16_t MasterID; 84 85class Request 86{ 87 public: 88 typedef uint32_t FlagsType; 89 typedef uint8_t ArchFlagsType; 90 typedef ::Flags<FlagsType> Flags; 91 92 /** 93 * Architecture specific flags. 94 * 95 * These bits int the flag field are reserved for 96 * architecture-specific code. For example, SPARC uses them to 97 * represent ASIs. 98 */ 99 static const FlagsType ARCH_BITS = 0x000000FF; 100 /** The request was an instruction fetch. */ 101 static const FlagsType INST_FETCH = 0x00000100; 102 /** The virtual address is also the physical address. */ 103 static const FlagsType PHYSICAL = 0x00000200; 104 /** The request is an ALPHA VPTE pal access (hw_ld). */ 105 static const FlagsType VPTE = 0x00000400; 106 /** Use the alternate mode bits in ALPHA. */ 107 static const FlagsType ALTMODE = 0x00000800; 108 /** The request is to an uncacheable address. */ 109 static const FlagsType UNCACHEABLE = 0x00001000; 110 /** This request is to a memory mapped register. */ 111 static const FlagsType MMAPPED_IPR = 0x00002000; 112 /** This request is a clear exclusive. */ 113 static const FlagsType CLEAR_LL = 0x00004000; 114 /** This request is made in privileged mode. */ 115 static const FlagsType PRIVILEGED = 0x00008000; 116 117 /** The request should not cause a memory access. */ 118 static const FlagsType NO_ACCESS = 0x00080000; 119 /** This request will lock or unlock the accessed memory. When used with 120 * a load, the access locks the particular chunk of memory. When used 121 * with a store, it unlocks. The rule is that locked accesses have to be 122 * made up of a locked load, some operation on the data, and then a locked 123 * store. 124 */ 125 static const FlagsType LOCKED = 0x00100000; 126 /** The request is a Load locked/store conditional. */ 127 static const FlagsType LLSC = 0x00200000; 128 /** This request is for a memory swap. */ 129 static const FlagsType MEM_SWAP = 0x00400000; 130 static const FlagsType MEM_SWAP_COND = 0x00800000; 131 132 /** The request is a prefetch. */ 133 static const FlagsType PREFETCH = 0x01000000; 134 /** The request should be prefetched into the exclusive state. */ 135 static const FlagsType PF_EXCLUSIVE = 0x02000000; 136 /** The request should be marked as LRU. */ 137 static const FlagsType EVICT_NEXT = 0x04000000; 138 139 /** The request should be handled by the generic IPR code (only 140 * valid together with MMAPPED_IPR) */ 141 static const FlagsType GENERIC_IPR = 0x08000000; 142 143 /** The request targets the secure memory space. */ 144 static const FlagsType SECURE = 0x10000000; 145 /** The request is a page table walk */ 146 static const FlagsType PT_WALK = 0x20000000; 147 148 /** These flags are *not* cleared when a Request object is reused 149 (assigned a new address). */ 150 static const FlagsType STICKY_FLAGS = INST_FETCH; 151 152 /** Request Ids that are statically allocated 153 * @{*/ 154 /** This request id is used for writeback requests by the caches */ 155 static const MasterID wbMasterId = 0; 156 /** This request id is used for functional requests that don't come from a 157 * particular device 158 */ 159 static const MasterID funcMasterId = 1; 160 /** This request id is used for message signaled interrupts */ 161 static const MasterID intMasterId = 2; 162 /** Invalid request id for assertion checking only. It is invalid behavior 163 * to ever send this id as part of a request. 164 * @todo C++1x replace with numeric_limits when constexpr is added */ 165 static const MasterID invldMasterId = USHRT_MAX; 166 /** @} */ 167 168 /** Invalid or unknown Pid. Possible when operating system is not present 169 * or has not assigned a pid yet */ 170 static const uint32_t invldPid = UINT_MAX; 171 172 private: 173 typedef uint8_t PrivateFlagsType; 174 typedef ::Flags<PrivateFlagsType> PrivateFlags; 175 176 /** Whether or not the size is valid. */ 177 static const PrivateFlagsType VALID_SIZE = 0x00000001; 178 /** Whether or not paddr is valid (has been written yet). */ 179 static const PrivateFlagsType VALID_PADDR = 0x00000002; 180 /** Whether or not the vaddr & asid are valid. */ 181 static const PrivateFlagsType VALID_VADDR = 0x00000004; 182 /** Whether or not the pc is valid. */ 183 static const PrivateFlagsType VALID_PC = 0x00000010; 184 /** Whether or not the context ID is valid. */ 185 static const PrivateFlagsType VALID_CONTEXT_ID = 0x00000020; 186 static const PrivateFlagsType VALID_THREAD_ID = 0x00000040; 187 /** Whether or not the sc result is valid. */ 188 static const PrivateFlagsType VALID_EXTRA_DATA = 0x00000080; 189 190 /** These flags are *not* cleared when a Request object is reused 191 (assigned a new address). */ 192 static const PrivateFlagsType STICKY_PRIVATE_FLAGS = 193 VALID_CONTEXT_ID | VALID_THREAD_ID; 194 195 private: 196 /** 197 * The physical address of the request. Valid only if validPaddr 198 * is set. 199 */ 200 Addr _paddr; 201 202 /** 203 * The size of the request. This field must be set when vaddr or 204 * paddr is written via setVirt() or setPhys(), so it is always 205 * valid as long as one of the address fields is valid. 206 */ 207 int _size; 208 209 /** The requestor ID which is unique in the system for all ports 210 * that are capable of issuing a transaction 211 */ 212 MasterID _masterId; 213 214 /** Flag structure for the request. */ 215 Flags _flags; 216 217 /** Private flags for field validity checking. */ 218 PrivateFlags privateFlags; 219 220 /** 221 * The time this request was started. Used to calculate 222 * latencies. This field is set to curTick() any time paddr or vaddr 223 * is written. 224 */ 225 Tick _time; 226 227 /** 228 * The task id associated with this request 229 */ 230 uint32_t _taskId; 231 232 /** The address space ID. */ 233 int _asid; 234 235 /** The virtual address of the request. */ 236 Addr _vaddr; 237 238 /** 239 * Extra data for the request, such as the return value of 240 * store conditional or the compare value for a CAS. */ 241 uint64_t _extraData; 242 243 /** The context ID (for statistics, typically). */ 244 int _contextId; 245 /** The thread ID (id within this CPU) */ 246 int _threadId; 247 248 /** program counter of initiating access; for tracing/debugging */ 249 Addr _pc; 250 251 public: 252 /** Minimal constructor. No fields are initialized. 253 * (Note that _flags and privateFlags are cleared by Flags 254 * default constructor.) 255 */ 256 Request() 257 : _taskId(ContextSwitchTaskId::Unknown), 258 translateDelta(0), accessDelta(0), depth(0) 259 {} 260 261 /** 262 * Constructor for physical (e.g. device) requests. Initializes 263 * just physical address, size, flags, and timestamp (to curTick()). 264 * These fields are adequate to perform a request. 265 */ 266 Request(Addr paddr, int size, Flags flags, MasterID mid) 267 : _taskId(ContextSwitchTaskId::Unknown) 268 { 269 setPhys(paddr, size, flags, mid); 270 } 271 272 Request(Addr paddr, int size, Flags flags, MasterID mid, Tick time) 273 : _taskId(ContextSwitchTaskId::Unknown) 274 { 275 setPhys(paddr, size, flags, mid, time); 276 } 277 278 Request(Addr paddr, int size, Flags flags, MasterID mid, Tick time, Addr pc) 279 : _taskId(ContextSwitchTaskId::Unknown) 280 { 281 setPhys(paddr, size, flags, mid, time); 282 privateFlags.set(VALID_PC); 283 _pc = pc; 284 } 285 286 Request(int asid, Addr vaddr, int size, Flags flags, MasterID mid, Addr pc, 287 int cid, ThreadID tid) 288 : _taskId(ContextSwitchTaskId::Unknown) 289 { 290 setVirt(asid, vaddr, size, flags, mid, pc); 291 setThreadContext(cid, tid); 292 } 293 294 ~Request() {} 295 296 /** 297 * Set up CPU and thread numbers. 298 */ 299 void 300 setThreadContext(int context_id, ThreadID tid) 301 { 302 _contextId = context_id; 303 _threadId = tid; 304 privateFlags.set(VALID_CONTEXT_ID|VALID_THREAD_ID); 305 } 306 307 /** 308 * Set up a physical (e.g. device) request in a previously 309 * allocated Request object. 310 */ 311 void 312 setPhys(Addr paddr, int size, Flags flags, MasterID mid, Tick time) 313 { 314 assert(size >= 0); 315 _paddr = paddr; 316 _size = size; 317 _time = time; 318 _masterId = mid; 319 _flags.clear(~STICKY_FLAGS); 320 _flags.set(flags); 321 privateFlags.clear(~STICKY_PRIVATE_FLAGS); 322 privateFlags.set(VALID_PADDR|VALID_SIZE); 323 depth = 0; 324 accessDelta = 0; 325 //translateDelta = 0; 326 } 327 328 void 329 setPhys(Addr paddr, int size, Flags flags, MasterID mid) 330 { 331 setPhys(paddr, size, flags, mid, curTick()); 332 } 333 334 /** 335 * Set up a virtual (e.g., CPU) request in a previously 336 * allocated Request object. 337 */ 338 void 339 setVirt(int asid, Addr vaddr, int size, Flags flags, MasterID mid, Addr pc) 340 { 341 assert(size >= 0); 342 _asid = asid; 343 _vaddr = vaddr; 344 _size = size; 345 _masterId = mid; 346 _pc = pc; 347 _time = curTick(); 348 349 _flags.clear(~STICKY_FLAGS); 350 _flags.set(flags); 351 privateFlags.clear(~STICKY_PRIVATE_FLAGS); 352 privateFlags.set(VALID_VADDR|VALID_SIZE|VALID_PC); 353 depth = 0; 354 accessDelta = 0; 355 translateDelta = 0; 356 } 357 358 /** 359 * Set just the physical address. This usually used to record the 360 * result of a translation. However, when using virtualized CPUs 361 * setPhys() is sometimes called to finalize a physical address 362 * without a virtual address, so we can't check if the virtual 363 * address is valid. 364 */ 365 void 366 setPaddr(Addr paddr) 367 { 368 _paddr = paddr; 369 privateFlags.set(VALID_PADDR); 370 } 371 372 /** 373 * Generate two requests as if this request had been split into two 374 * pieces. The original request can't have been translated already. 375 */ 376 void splitOnVaddr(Addr split_addr, RequestPtr &req1, RequestPtr &req2) 377 { 378 assert(privateFlags.isSet(VALID_VADDR)); 379 assert(privateFlags.noneSet(VALID_PADDR)); 380 assert(split_addr > _vaddr && split_addr < _vaddr + _size); 381 req1 = new Request; 382 *req1 = *this; 383 req2 = new Request; 384 *req2 = *this; 385 req1->_size = split_addr - _vaddr; 386 req2->_vaddr = split_addr; 387 req2->_size = _size - req1->_size; 388 } 389 390 /** 391 * Accessor for paddr. 392 */ 393 bool 394 hasPaddr() 395 { 396 return privateFlags.isSet(VALID_PADDR); 397 } 398 399 Addr 400 getPaddr() 401 { 402 assert(privateFlags.isSet(VALID_PADDR)); 403 return _paddr; 404 } 405 406 /** 407 * Time for the TLB/table walker to successfully translate this request. 408 */ 409 Tick translateDelta; 410 411 /** 412 * Access latency to complete this memory transaction not including 413 * translation time. 414 */ 415 Tick accessDelta; 416 417 /** 418 * Level of the cache hierachy where this request was responded to 419 * (e.g. 0 = L1; 1 = L2). 420 */ 421 int depth; 422 423 /** 424 * Accessor for size. 425 */ 426 bool 427 hasSize() 428 { 429 return privateFlags.isSet(VALID_SIZE); 430 } 431 432 int 433 getSize() 434 { 435 assert(privateFlags.isSet(VALID_SIZE)); 436 return _size; 437 } 438 439 /** Accessor for time. */ 440 Tick 441 time() const 442 { 443 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR)); 444 return _time; 445 } 446 447 void 448 time(Tick time) 449 { 450 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR)); 451 _time = time; 452 } 453 454 /** Accessor for flags. */ 455 Flags 456 getFlags() 457 { 458 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR)); 459 return _flags; 460 } 461 462 /** Note that unlike other accessors, this function sets *specific 463 flags* (ORs them in); it does not assign its argument to the 464 _flags field. Thus this method should rightly be called 465 setFlags() and not just flags(). */ 466 void 467 setFlags(Flags flags) 468 { 469 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR)); 470 _flags.set(flags); 471 } 472 473 void 474 setArchFlags(Flags flags) 475 { 476 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR)); 477 _flags.set(flags & ARCH_BITS); 478 } 479 480 /** Accessor function for vaddr.*/ 481 Addr 482 getVaddr() 483 { 484 assert(privateFlags.isSet(VALID_VADDR)); 485 return _vaddr; 486 } 487 488 /** Accesssor for the requestor id. */ 489 MasterID 490 masterId() 491 { 492 return _masterId; 493 } 494 495 uint32_t 496 taskId() const 497 { 498 return _taskId; 499 } 500 501 void 502 taskId(uint32_t id) { 503 _taskId = id; 504 } 505 506 /** Accessor function for asid.*/ 507 int 508 getAsid() 509 { 510 assert(privateFlags.isSet(VALID_VADDR)); 511 return _asid; 512 } 513 514 /** Accessor function for asid.*/ 515 void 516 setAsid(int asid) 517 { 518 _asid = asid; 519 } 520 521 /** Accessor function for architecture-specific flags.*/ 522 ArchFlagsType 523 getArchFlags() 524 { 525 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR)); 526 return _flags & ARCH_BITS; 527 } 528 529 /** Accessor function to check if sc result is valid. */ 530 bool 531 extraDataValid() 532 { 533 return privateFlags.isSet(VALID_EXTRA_DATA); 534 } 535 536 /** Accessor function for store conditional return value.*/ 537 uint64_t 538 getExtraData() const 539 { 540 assert(privateFlags.isSet(VALID_EXTRA_DATA)); 541 return _extraData; 542 } 543 544 /** Accessor function for store conditional return value.*/ 545 void 546 setExtraData(uint64_t extraData) 547 { 548 _extraData = extraData; 549 privateFlags.set(VALID_EXTRA_DATA); 550 } 551 552 bool 553 hasContextId() const 554 { 555 return privateFlags.isSet(VALID_CONTEXT_ID); 556 } 557 558 /** Accessor function for context ID.*/ 559 int 560 contextId() const 561 { 562 assert(privateFlags.isSet(VALID_CONTEXT_ID)); 563 return _contextId; 564 } 565 566 /** Accessor function for thread ID. */ 567 int 568 threadId() const 569 { 570 assert(privateFlags.isSet(VALID_THREAD_ID)); 571 return _threadId; 572 } 573 574 bool 575 hasPC() const 576 { 577 return privateFlags.isSet(VALID_PC); 578 } 579 580 /** Accessor function for pc.*/ 581 Addr 582 getPC() const 583 { 584 assert(privateFlags.isSet(VALID_PC)); 585 return _pc; 586 } 587 588 /** 589 * Increment/Get the depth at which this request is responded to. 590 * This currently happens when the request misses in any cache level. 591 */ 592 void incAccessDepth() { depth++; } 593 int getAccessDepth() const { return depth; } 594 595 /** 596 * Set/Get the time taken for this request to be successfully translated. 597 */ 598 void setTranslateLatency() { translateDelta = curTick() - _time; } 599 Tick getTranslateLatency() const { return translateDelta; } 600 601 /** 602 * Set/Get the time taken to complete this request's access, not including 603 * the time to successfully translate the request. 604 */ 605 void setAccessLatency() { accessDelta = curTick() - _time - translateDelta; } 606 Tick getAccessLatency() const { return accessDelta; } 607 608 /** Accessor functions for flags. Note that these are for testing 609 only; setting flags should be done via setFlags(). */ 610 bool isUncacheable() const { return _flags.isSet(UNCACHEABLE); } 611 bool isInstFetch() const { return _flags.isSet(INST_FETCH); } 612 bool isPrefetch() const { return _flags.isSet(PREFETCH); } 613 bool isLLSC() const { return _flags.isSet(LLSC); } 614 bool isPriv() const { return _flags.isSet(PRIVILEGED); } 615 bool isLocked() const { return _flags.isSet(LOCKED); } 616 bool isSwap() const { return _flags.isSet(MEM_SWAP|MEM_SWAP_COND); } 617 bool isCondSwap() const { return _flags.isSet(MEM_SWAP_COND); } 618 bool isMmappedIpr() const { return _flags.isSet(MMAPPED_IPR); } 619 bool isClearLL() const { return _flags.isSet(CLEAR_LL); } 620 bool isSecure() const { return _flags.isSet(SECURE); } 621 bool isPTWalk() const { return _flags.isSet(PT_WALK); } 622}; 623 624#endif // __MEM_REQUEST_HH__ 625