physical.hh revision 9293
1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions are 16 * met: redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer; 18 * redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution; 21 * neither the name of the copyright holders nor the names of its 22 * contributors may be used to endorse or promote products derived from 23 * this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * Authors: Andreas Hansson 38 */ 39 40#ifndef __PHYSICAL_MEMORY_HH__ 41#define __PHYSICAL_MEMORY_HH__ 42 43#include "base/addr_range_map.hh" 44#include "mem/port.hh" 45 46/** 47 * Forward declaration to avoid header dependencies. 48 */ 49class AbstractMemory; 50 51/** 52 * The physical memory encapsulates all memories in the system and 53 * provides basic functionality for accessing those memories without 54 * going through the memory system and interconnect. 55 * 56 * The physical memory is also responsible for providing the host 57 * system backingstore used by the memories in the simulated guest 58 * system. When the system is created, the physical memory allocates 59 * the backing store based on the address ranges that are populated in 60 * the system, and does so indepentent of how those map to actual 61 * memory controllers. Thus, the physical memory completely abstracts 62 * the mapping of the backing store of the host system and the address 63 * mapping in the guest system. This enables us to arbitrarily change 64 * the number of memory controllers, and their address mapping, as 65 * long as the ranges stay the same. 66 */ 67class PhysicalMemory : public Serializable 68{ 69 70 private: 71 72 // Name for debugging 73 std::string _name; 74 75 // Global address map 76 AddrRangeMap<AbstractMemory*> addrMap; 77 78 // a mutable cache for the last range that matched an address 79 mutable AddrRange rangeCache; 80 81 // All address-mapped memories 82 std::vector<AbstractMemory*> memories; 83 84 // The total memory size 85 uint64_t size; 86 87 // The physical memory used to provide the memory in the simulated 88 // system 89 std::vector<std::pair<AddrRange, uint8_t*> > backingStore; 90 91 // Prevent copying 92 PhysicalMemory(const PhysicalMemory&); 93 94 // Prevent assignment 95 PhysicalMemory& operator=(const PhysicalMemory&); 96 97 /** 98 * Create the memory region providing the backing store for a 99 * given address range that corresponds to a set of memories in 100 * the simulated system. 101 * 102 * @param range The address range covered 103 * @param memories The memories this range maps to 104 */ 105 void createBackingStore(AddrRange range, 106 const std::vector<AbstractMemory*>& _memories); 107 108 public: 109 110 /** 111 * Create a physical memory object, wrapping a number of memories. 112 */ 113 PhysicalMemory(const std::string& _name, 114 const std::vector<AbstractMemory*>& _memories); 115 116 /** 117 * Unmap all the backing store we have used. 118 */ 119 ~PhysicalMemory(); 120 121 /** 122 * Return the name for debugging and for creation of sections for 123 * checkpointing. 124 */ 125 const std::string name() const { return _name; } 126 127 /** 128 * Check if a physical address is within a range of a memory that 129 * is part of the global address map. 130 * 131 * @param addr A physical address 132 * @return Whether the address corresponds to a memory 133 */ 134 bool isMemAddr(Addr addr) const; 135 136 /** 137 * Get the memory ranges for all memories that are to be reported 138 * to the configuration table. 139 * 140 * @return All configuration table memory ranges 141 */ 142 AddrRangeList getConfAddrRanges() const; 143 144 /** 145 * Get the total physical memory size. 146 * 147 * @return The sum of all memory sizes 148 */ 149 uint64_t totalSize() const { return size; } 150 151 /** 152 * Get the pointers to the backing store for external host 153 * access. Note that memory in the guest should be accessed using 154 * access() or functionalAccess(). This interface is primarily 155 * intended for CPU models using hardware virtualization. Note 156 * that memories that are null are not present, and that the 157 * backing store may also contain memories that are not part of 158 * the OS-visible global address map and thus are allowed to 159 * overlap. 160 * 161 * @return Pointers to the memory backing store 162 */ 163 std::vector<std::pair<AddrRange, uint8_t*> > getBackingStore() const 164 { return backingStore; } 165 166 /** 167 * Perform an untimed memory access and update all the state 168 * (e.g. locked addresses) and statistics accordingly. The packet 169 * is turned into a response if required. 170 * 171 * @param pkt Packet performing the access 172 */ 173 void access(PacketPtr pkt); 174 175 /** 176 * Perform an untimed memory read or write without changing 177 * anything but the memory itself. No stats are affected by this 178 * access. In addition to normal accesses this also facilitates 179 * print requests. 180 * 181 * @param pkt Packet performing the access 182 */ 183 void functionalAccess(PacketPtr pkt); 184 185 /** 186 * Serialize all the memories in the system. This is independent 187 * of the logical memory layout, and the serialization only sees 188 * the contigous backing store, independent of how this maps to 189 * logical memories in the guest system. 190 * 191 * @param os stream to serialize to 192 */ 193 void serialize(std::ostream& os); 194 195 /** 196 * Serialize a specific store. 197 * 198 * @param store_id Unique identifier of this backing store 199 * @param range The address range of this backing store 200 * @param pmem The host pointer to this backing store 201 */ 202 void serializeStore(std::ostream& os, unsigned int store_id, 203 AddrRange range, uint8_t* pmem); 204 205 /** 206 * Unserialize the memories in the system. As with the 207 * serialization, this action is independent of how the address 208 * ranges are mapped to logical memories in the guest system. 209 */ 210 void unserialize(Checkpoint* cp, const std::string& section); 211 212 /** 213 * Unserialize a specific backing store, identified by a section. 214 */ 215 void unserializeStore(Checkpoint* cp, const std::string& section); 216 217}; 218 219#endif //__PHYSICAL_MEMORY_HH__ 220