physical.hh revision 7733
12391SN/A/* 22391SN/A * Copyright (c) 2001-2005 The Regents of The University of Michigan 32391SN/A * All rights reserved. 42391SN/A * 52391SN/A * Redistribution and use in source and binary forms, with or without 62391SN/A * modification, are permitted provided that the following conditions are 72391SN/A * met: redistributions of source code must retain the above copyright 82391SN/A * notice, this list of conditions and the following disclaimer; 92391SN/A * redistributions in binary form must reproduce the above copyright 102391SN/A * notice, this list of conditions and the following disclaimer in the 112391SN/A * documentation and/or other materials provided with the distribution; 122391SN/A * neither the name of the copyright holders nor the names of its 132391SN/A * contributors may be used to endorse or promote products derived from 142391SN/A * this software without specific prior written permission. 152391SN/A * 162391SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172391SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182391SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192391SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202391SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212391SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222391SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232391SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242391SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252391SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262391SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Ron Dreslinski 292391SN/A */ 302391SN/A 312391SN/A/* @file 322391SN/A */ 332391SN/A 342391SN/A#ifndef __PHYSICAL_MEMORY_HH__ 352391SN/A#define __PHYSICAL_MEMORY_HH__ 362391SN/A 374762Snate@binkert.org#include <map> 384762Snate@binkert.org#include <string> 394762Snate@binkert.org 402391SN/A#include "base/range.hh" 412462SN/A#include "mem/mem_object.hh" 422414SN/A#include "mem/packet.hh" 432914Ssaidi@eecs.umich.edu#include "mem/tport.hh" 444762Snate@binkert.org#include "params/PhysicalMemory.hh" 452415SN/A#include "sim/eventq.hh" 462462SN/A 472391SN/A// 482391SN/A// Functional model for a contiguous block of physical memory. (i.e. RAM) 492391SN/A// 502462SN/Aclass PhysicalMemory : public MemObject 512391SN/A{ 526107Ssteve.reinhardt@amd.com protected: 536107Ssteve.reinhardt@amd.com 542914Ssaidi@eecs.umich.edu class MemoryPort : public SimpleTimingPort 552413SN/A { 562413SN/A PhysicalMemory *memory; 572413SN/A 582413SN/A public: 592413SN/A 602640Sstever@eecs.umich.edu MemoryPort(const std::string &_name, PhysicalMemory *_memory); 612413SN/A 622413SN/A protected: 632413SN/A 643349Sbinkertn@umich.edu virtual Tick recvAtomic(PacketPtr pkt); 652413SN/A 663349Sbinkertn@umich.edu virtual void recvFunctional(PacketPtr pkt); 672413SN/A 682413SN/A virtual void recvStatusChange(Status status); 692413SN/A 702521SN/A virtual void getDeviceAddressRanges(AddrRangeList &resp, 714475Sstever@eecs.umich.edu bool &snoop); 722413SN/A 736227Snate@binkert.org virtual unsigned deviceBlockSize() const; 742413SN/A }; 752413SN/A 762416SN/A int numPorts; 772416SN/A 782413SN/A 792391SN/A private: 802391SN/A // prevent copying of a MainMemory object 812391SN/A PhysicalMemory(const PhysicalMemory &specmem); 822391SN/A const PhysicalMemory &operator=(const PhysicalMemory &specmem); 832391SN/A 842391SN/A protected: 853170Sstever@eecs.umich.edu 863170Sstever@eecs.umich.edu class LockedAddr { 873170Sstever@eecs.umich.edu public: 883170Sstever@eecs.umich.edu // on alpha, minimum LL/SC granularity is 16 bytes, so lower 893170Sstever@eecs.umich.edu // bits need to masked off. 903170Sstever@eecs.umich.edu static const Addr Addr_Mask = 0xf; 913170Sstever@eecs.umich.edu 923170Sstever@eecs.umich.edu static Addr mask(Addr paddr) { return (paddr & ~Addr_Mask); } 933170Sstever@eecs.umich.edu 945543Ssaidi@eecs.umich.edu Addr addr; // locked address 955714Shsul@eecs.umich.edu int contextId; // locking hw context 963170Sstever@eecs.umich.edu 973170Sstever@eecs.umich.edu // check for matching execution context 983170Sstever@eecs.umich.edu bool matchesContext(Request *req) 993170Sstever@eecs.umich.edu { 1005714Shsul@eecs.umich.edu return (contextId == req->contextId()); 1013170Sstever@eecs.umich.edu } 1023170Sstever@eecs.umich.edu 1033170Sstever@eecs.umich.edu LockedAddr(Request *req) 1043170Sstever@eecs.umich.edu : addr(mask(req->getPaddr())), 1055714Shsul@eecs.umich.edu contextId(req->contextId()) 1063170Sstever@eecs.umich.edu { 1073170Sstever@eecs.umich.edu } 1087733SAli.Saidi@ARM.com // constructor for unserialization use 1097733SAli.Saidi@ARM.com LockedAddr(Addr _addr, int _cid) 1107733SAli.Saidi@ARM.com : addr(_addr), contextId(_cid) 1117733SAli.Saidi@ARM.com { 1127733SAli.Saidi@ARM.com } 1133170Sstever@eecs.umich.edu }; 1143170Sstever@eecs.umich.edu 1153170Sstever@eecs.umich.edu std::list<LockedAddr> lockedAddrList; 1163170Sstever@eecs.umich.edu 1173170Sstever@eecs.umich.edu // helper function for checkLockedAddrs(): we really want to 1183170Sstever@eecs.umich.edu // inline a quick check for an empty locked addr list (hopefully 1193170Sstever@eecs.umich.edu // the common case), and do the full list search (if necessary) in 1203170Sstever@eecs.umich.edu // this out-of-line function 1214626Sstever@eecs.umich.edu bool checkLockedAddrList(PacketPtr pkt); 1223170Sstever@eecs.umich.edu 1233170Sstever@eecs.umich.edu // Record the address of a load-locked operation so that we can 1243170Sstever@eecs.umich.edu // clear the execution context's lock flag if a matching store is 1253170Sstever@eecs.umich.edu // performed 1264626Sstever@eecs.umich.edu void trackLoadLocked(PacketPtr pkt); 1273170Sstever@eecs.umich.edu 1283170Sstever@eecs.umich.edu // Compare a store address with any locked addresses so we can 1293170Sstever@eecs.umich.edu // clear the lock flag appropriately. Return value set to 'false' 1303170Sstever@eecs.umich.edu // if store operation should be suppressed (because it was a 1313170Sstever@eecs.umich.edu // conditional store and the address was no longer locked by the 1323170Sstever@eecs.umich.edu // requesting execution context), 'true' otherwise. Note that 1333170Sstever@eecs.umich.edu // this method must be called on *all* stores since even 1343170Sstever@eecs.umich.edu // non-conditional stores must clear any matching lock addresses. 1354626Sstever@eecs.umich.edu bool writeOK(PacketPtr pkt) { 1364626Sstever@eecs.umich.edu Request *req = pkt->req; 1373170Sstever@eecs.umich.edu if (lockedAddrList.empty()) { 1383170Sstever@eecs.umich.edu // no locked addrs: nothing to check, store_conditional fails 1396102Sgblack@eecs.umich.edu bool isLLSC = pkt->isLLSC(); 1406102Sgblack@eecs.umich.edu if (isLLSC) { 1414040Ssaidi@eecs.umich.edu req->setExtraData(0); 1423170Sstever@eecs.umich.edu } 1436102Sgblack@eecs.umich.edu return !isLLSC; // only do write if not an sc 1443170Sstever@eecs.umich.edu } else { 1453170Sstever@eecs.umich.edu // iterate over list... 1464626Sstever@eecs.umich.edu return checkLockedAddrList(pkt); 1473170Sstever@eecs.umich.edu } 1483170Sstever@eecs.umich.edu } 1493170Sstever@eecs.umich.edu 1503012Ssaidi@eecs.umich.edu uint8_t *pmemAddr; 1513012Ssaidi@eecs.umich.edu int pagePtr; 1522565SN/A Tick lat; 1535399Ssaidi@eecs.umich.edu Tick lat_var; 1544467Sstever@eecs.umich.edu std::vector<MemoryPort*> ports; 1554467Sstever@eecs.umich.edu typedef std::vector<MemoryPort*>::iterator PortIterator; 1562391SN/A 1577730SAli.Saidi@ARM.com uint64_t _size; 1587730SAli.Saidi@ARM.com uint64_t _start; 1592391SN/A public: 1602391SN/A Addr new_page(); 1617730SAli.Saidi@ARM.com uint64_t size() { return _size; } 1627730SAli.Saidi@ARM.com uint64_t start() { return _start; } 1632391SN/A 1642391SN/A public: 1654762Snate@binkert.org typedef PhysicalMemoryParams Params; 1664762Snate@binkert.org PhysicalMemory(const Params *p); 1672391SN/A virtual ~PhysicalMemory(); 1682391SN/A 1694762Snate@binkert.org const Params * 1704762Snate@binkert.org params() const 1714762Snate@binkert.org { 1724762Snate@binkert.org return dynamic_cast<const Params *>(_params); 1734762Snate@binkert.org } 1744762Snate@binkert.org 1752391SN/A public: 1766227Snate@binkert.org unsigned deviceBlockSize() const; 1774475Sstever@eecs.umich.edu void getAddressRanges(AddrRangeList &resp, bool &snoop); 1782738Sstever@eecs.umich.edu virtual Port *getPort(const std::string &if_name, int idx = -1); 1792541SN/A void virtual init(); 1802914Ssaidi@eecs.umich.edu unsigned int drain(Event *de); 1812391SN/A 1823012Ssaidi@eecs.umich.edu protected: 1834626Sstever@eecs.umich.edu Tick doAtomicAccess(PacketPtr pkt); 1843349Sbinkertn@umich.edu void doFunctionalAccess(PacketPtr pkt); 1853349Sbinkertn@umich.edu virtual Tick calculateLatency(PacketPtr pkt); 1862413SN/A void recvStatusChange(Port::Status status); 1872391SN/A 1882391SN/A public: 1892391SN/A virtual void serialize(std::ostream &os); 1902391SN/A virtual void unserialize(Checkpoint *cp, const std::string §ion); 1912497SN/A 1922391SN/A}; 1932391SN/A 1942391SN/A#endif //__PHYSICAL_MEMORY_HH__ 195