noncoherent_cache.hh revision 13948:f8666d4d5855
15443Sgblack@eecs.umich.edu/* 25443Sgblack@eecs.umich.edu * Copyright (c) 2012-2018 ARM Limited 35443Sgblack@eecs.umich.edu * All rights reserved. 45443Sgblack@eecs.umich.edu * 55443Sgblack@eecs.umich.edu * The license below extends only to copyright in the software and shall 65443Sgblack@eecs.umich.edu * not be construed as granting a license to any other intellectual 75443Sgblack@eecs.umich.edu * property including but not limited to intellectual property relating 85443Sgblack@eecs.umich.edu * to a hardware implementation of the functionality of the software 95443Sgblack@eecs.umich.edu * licensed hereunder. You may use the software subject to the license 105443Sgblack@eecs.umich.edu * terms below provided that you ensure that this notice is replicated 115443Sgblack@eecs.umich.edu * unmodified and in its entirety in all distributions of the software, 125443Sgblack@eecs.umich.edu * modified or unmodified, in source code or in binary form. 135443Sgblack@eecs.umich.edu * 145443Sgblack@eecs.umich.edu * Copyright (c) 2002-2005 The Regents of The University of Michigan 155443Sgblack@eecs.umich.edu * All rights reserved. 165443Sgblack@eecs.umich.edu * 175443Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 185443Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 195443Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 205443Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 215443Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 225443Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 235443Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 245443Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 255443Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 265443Sgblack@eecs.umich.edu * this software without specific prior written permission. 275443Sgblack@eecs.umich.edu * 285443Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 295443Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 305443Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 315443Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 325443Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 335443Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 345443Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 355443Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 368229Snate@binkert.org * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 375606Snate@binkert.org * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 385606Snate@binkert.org * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 395443Sgblack@eecs.umich.edu * 406216Snate@binkert.org * Authors: Erik Hallnor 419356Snilay@cs.wisc.edu * Dave Greene 428232Snate@binkert.org * Steve Reinhardt 439356Snilay@cs.wisc.edu * Ron Dreslinski 445443Sgblack@eecs.umich.edu * Andreas Hansson 455443Sgblack@eecs.umich.edu * Nikos Nikoleris 465443Sgblack@eecs.umich.edu */ 475606Snate@binkert.org 485443Sgblack@eecs.umich.edu/** 495635Sgblack@eecs.umich.edu * @file 505443Sgblack@eecs.umich.edu * Specifies a non-coherent cache. The non-coherent cache is expected 515443Sgblack@eecs.umich.edu * to be located below the point of coherency. All valid blocks in the 525443Sgblack@eecs.umich.edu * non-coherent cache can always be written to without any prior 535443Sgblack@eecs.umich.edu * invalidations or snoops. 545443Sgblack@eecs.umich.edu */ 555443Sgblack@eecs.umich.edu 565443Sgblack@eecs.umich.edu#ifndef __MEM_CACHE_NONCOHERENT_CACHE_HH__ 575443Sgblack@eecs.umich.edu#define __MEM_CACHE_NONCOHERENT_CACHE_HH__ 585443Sgblack@eecs.umich.edu 595443Sgblack@eecs.umich.edu#include "base/logging.hh" 605443Sgblack@eecs.umich.edu#include "base/types.hh" 615443Sgblack@eecs.umich.edu#include "mem/cache/base.hh" 625443Sgblack@eecs.umich.edu#include "mem/packet.hh" 635443Sgblack@eecs.umich.edu 645443Sgblack@eecs.umich.educlass CacheBlk; 655443Sgblack@eecs.umich.educlass MSHR; 665443Sgblack@eecs.umich.edustruct NoncoherentCacheParams; 675443Sgblack@eecs.umich.edu 685443Sgblack@eecs.umich.edu/** 695443Sgblack@eecs.umich.edu * A non-coherent cache 705443Sgblack@eecs.umich.edu */ 715443Sgblack@eecs.umich.educlass NoncoherentCache : public BaseCache 725443Sgblack@eecs.umich.edu{ 735443Sgblack@eecs.umich.edu protected: 745443Sgblack@eecs.umich.edu bool access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat) override; 755443Sgblack@eecs.umich.edu 765443Sgblack@eecs.umich.edu void handleTimingReqMiss(PacketPtr pkt, CacheBlk *blk, 775443Sgblack@eecs.umich.edu Tick forward_time, 785443Sgblack@eecs.umich.edu Tick request_time) override; 795443Sgblack@eecs.umich.edu 805443Sgblack@eecs.umich.edu void recvTimingReq(PacketPtr pkt) override; 815443Sgblack@eecs.umich.edu 825443Sgblack@eecs.umich.edu void doWritebacks(PacketPtr pkt, 835443Sgblack@eecs.umich.edu Tick forward_time) override; 845443Sgblack@eecs.umich.edu 855443Sgblack@eecs.umich.edu void doWritebacksAtomic(PacketPtr pkt) override; 865443Sgblack@eecs.umich.edu 875443Sgblack@eecs.umich.edu void serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt, 885443Sgblack@eecs.umich.edu CacheBlk *blk) override; 895443Sgblack@eecs.umich.edu 905443Sgblack@eecs.umich.edu void recvTimingResp(PacketPtr pkt) override; 915443Sgblack@eecs.umich.edu 925443Sgblack@eecs.umich.edu void recvTimingSnoopReq(PacketPtr pkt) override { 935443Sgblack@eecs.umich.edu panic("Unexpected timing snoop request %s", pkt->print()); 945443Sgblack@eecs.umich.edu } 955642Sgblack@eecs.umich.edu 965443Sgblack@eecs.umich.edu void recvTimingSnoopResp(PacketPtr pkt) override { 975443Sgblack@eecs.umich.edu panic("Unexpected timing snoop response %s", pkt->print()); 985443Sgblack@eecs.umich.edu } 995443Sgblack@eecs.umich.edu 1005443Sgblack@eecs.umich.edu Cycles handleAtomicReqMiss(PacketPtr pkt, CacheBlk *&blk) override; 1015444Sgblack@eecs.umich.edu 1025444Sgblack@eecs.umich.edu Tick recvAtomic(PacketPtr pkt) override; 1036067Sgblack@eecs.umich.edu 1046067Sgblack@eecs.umich.edu Tick recvAtomicSnoop(PacketPtr pkt) override { 10510642Scdirik@micron.com panic("Unexpected atomic snoop request %s", pkt->print()); 10610642Scdirik@micron.com } 1075443Sgblack@eecs.umich.edu 1085443Sgblack@eecs.umich.edu void functionalAccess(PacketPtr pkt, bool from_cpu_side) override; 1095443Sgblack@eecs.umich.edu 1105443Sgblack@eecs.umich.edu void satisfyRequest(PacketPtr pkt, CacheBlk *blk, 1115443Sgblack@eecs.umich.edu bool deferred_response = false, 1125443Sgblack@eecs.umich.edu bool pending_downgrade = false) override; 1135642Sgblack@eecs.umich.edu 1145642Sgblack@eecs.umich.edu /* 1155443Sgblack@eecs.umich.edu * Creates a new packet with the request to be send to the memory 1165443Sgblack@eecs.umich.edu * below. The noncoherent cache is below the point of coherence 11710642Scdirik@micron.com * and therefore all fills bring in writable, therefore the 11810642Scdirik@micron.com * needs_writeble parameter is ignored. 11910642Scdirik@micron.com */ 1206067Sgblack@eecs.umich.edu PacketPtr createMissPacket(PacketPtr cpu_pkt, CacheBlk *blk, 1216067Sgblack@eecs.umich.edu bool needs_writable, 1225443Sgblack@eecs.umich.edu bool is_whole_line_write) const override; 1235443Sgblack@eecs.umich.edu 1245443Sgblack@eecs.umich.edu M5_NODISCARD PacketPtr evictBlock(CacheBlk *blk) override; 1255443Sgblack@eecs.umich.edu 1265443Sgblack@eecs.umich.edu public: 1275443Sgblack@eecs.umich.edu NoncoherentCache(const NoncoherentCacheParams *p); 1285443Sgblack@eecs.umich.edu}; 12910642Scdirik@micron.com 13010642Scdirik@micron.com#endif // __MEM_CACHE_NONCOHERENTCACHE_HH__ 13110642Scdirik@micron.com