SConscript revision 9104
110461SAndreas.Sandberg@ARM.com# -*- mode:python -*- 212973Sandreas.sandberg@arm.com 310461SAndreas.Sandberg@ARM.com# Copyright (c) 2006 The Regents of The University of Michigan 410461SAndreas.Sandberg@ARM.com# All rights reserved. 510461SAndreas.Sandberg@ARM.com# 610461SAndreas.Sandberg@ARM.com# Redistribution and use in source and binary forms, with or without 710461SAndreas.Sandberg@ARM.com# modification, are permitted provided that the following conditions are 810461SAndreas.Sandberg@ARM.com# met: redistributions of source code must retain the above copyright 910461SAndreas.Sandberg@ARM.com# notice, this list of conditions and the following disclaimer; 1010461SAndreas.Sandberg@ARM.com# redistributions in binary form must reproduce the above copyright 1110461SAndreas.Sandberg@ARM.com# notice, this list of conditions and the following disclaimer in the 1210461SAndreas.Sandberg@ARM.com# documentation and/or other materials provided with the distribution; 1310461SAndreas.Sandberg@ARM.com# neither the name of the copyright holders nor the names of its 1410461SAndreas.Sandberg@ARM.com# contributors may be used to endorse or promote products derived from 1510461SAndreas.Sandberg@ARM.com# this software without specific prior written permission. 1610461SAndreas.Sandberg@ARM.com# 1710461SAndreas.Sandberg@ARM.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1810461SAndreas.Sandberg@ARM.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1910461SAndreas.Sandberg@ARM.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2010461SAndreas.Sandberg@ARM.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2110461SAndreas.Sandberg@ARM.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2210461SAndreas.Sandberg@ARM.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2310461SAndreas.Sandberg@ARM.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2410461SAndreas.Sandberg@ARM.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2510461SAndreas.Sandberg@ARM.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2610461SAndreas.Sandberg@ARM.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2710461SAndreas.Sandberg@ARM.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2810461SAndreas.Sandberg@ARM.com# 2910461SAndreas.Sandberg@ARM.com# Authors: Nathan Binkert 3010461SAndreas.Sandberg@ARM.com 3110461SAndreas.Sandberg@ARM.comImport('*') 3210461SAndreas.Sandberg@ARM.com 3310461SAndreas.Sandberg@ARM.comSimObject('Bridge.py') 3410461SAndreas.Sandberg@ARM.comSimObject('Bus.py') 3510461SAndreas.Sandberg@ARM.comSimObject('CommMonitor.py') 3610461SAndreas.Sandberg@ARM.comSimObject('MemObject.py') 3710461SAndreas.Sandberg@ARM.com 3810461SAndreas.Sandberg@ARM.comSource('bridge.cc') 3910461SAndreas.Sandberg@ARM.comSource('bus.cc') 4010461SAndreas.Sandberg@ARM.comSource('coherent_bus.cc') 4110461SAndreas.Sandberg@ARM.comSource('comm_monitor.cc') 4210461SAndreas.Sandberg@ARM.comSource('mem_object.cc') 4310461SAndreas.Sandberg@ARM.comSource('mport.cc') 4410461SAndreas.Sandberg@ARM.comSource('noncoherent_bus.cc') 4510461SAndreas.Sandberg@ARM.comSource('packet.cc') 4610461SAndreas.Sandberg@ARM.comSource('port.cc') 4710461SAndreas.Sandberg@ARM.comSource('packet_queue.cc') 4810461SAndreas.Sandberg@ARM.comSource('tport.cc') 4910461SAndreas.Sandberg@ARM.comSource('port_proxy.cc') 5012286Sjose.marinho@arm.comSource('fs_translating_port_proxy.cc') 5112286Sjose.marinho@arm.comSource('se_translating_port_proxy.cc') 5212286Sjose.marinho@arm.com 5312286Sjose.marinho@arm.comif env['TARGET_ISA'] != 'no': 5412286Sjose.marinho@arm.com SimObject('AbstractMemory.py') 5510461SAndreas.Sandberg@ARM.com SimObject('SimpleMemory.py') 5612286Sjose.marinho@arm.com Source('abstract_mem.cc') 5710461SAndreas.Sandberg@ARM.com Source('simple_mem.cc') 5810461SAndreas.Sandberg@ARM.com Source('page_table.cc') 5910461SAndreas.Sandberg@ARM.com Source('physical.cc') 6010461SAndreas.Sandberg@ARM.com 6112973Sandreas.sandberg@arm.comDebugFlag('BaseBus') 6210461SAndreas.Sandberg@ARM.comDebugFlag('BusAddrRanges') 6310461SAndreas.Sandberg@ARM.comDebugFlag('CoherentBus') 6410461SAndreas.Sandberg@ARM.comDebugFlag('NoncoherentBus') 6510461SAndreas.Sandberg@ARM.comCompoundFlag('Bus', ['BaseBus', 'BusAddrRanges', 'CoherentBus', 6610461SAndreas.Sandberg@ARM.com 'NoncoherentBus']) 6710461SAndreas.Sandberg@ARM.com 6810461SAndreas.Sandberg@ARM.comDebugFlag('BusBridge') 6910461SAndreas.Sandberg@ARM.comDebugFlag('CommMonitor') 7010461SAndreas.Sandberg@ARM.comDebugFlag('LLSC') 7110461SAndreas.Sandberg@ARM.comDebugFlag('MMU') 7210461SAndreas.Sandberg@ARM.comDebugFlag('MemoryAccess') 7310461SAndreas.Sandberg@ARM.comDebugFlag('PacketQueue') 7410461SAndreas.Sandberg@ARM.com 7510461SAndreas.Sandberg@ARM.comDebugFlag('ProtocolTrace') 7610461SAndreas.Sandberg@ARM.comDebugFlag('RubyCache') 7710461SAndreas.Sandberg@ARM.comDebugFlag('RubyCacheTrace') 7810461SAndreas.Sandberg@ARM.comDebugFlag('RubyDma') 7910461SAndreas.Sandberg@ARM.comDebugFlag('RubyGenerated') 8010461SAndreas.Sandberg@ARM.comDebugFlag('RubyMemory') 8110461SAndreas.Sandberg@ARM.comDebugFlag('RubyNetwork') 8210461SAndreas.Sandberg@ARM.comDebugFlag('RubyPort') 8310461SAndreas.Sandberg@ARM.comDebugFlag('RubyQueue') 8410461SAndreas.Sandberg@ARM.comDebugFlag('RubySequencer') 8510461SAndreas.Sandberg@ARM.comDebugFlag('RubySlicc') 8610461SAndreas.Sandberg@ARM.comDebugFlag('RubySystem') 8710461SAndreas.Sandberg@ARM.comDebugFlag('RubyTester') 8810461SAndreas.Sandberg@ARM.comDebugFlag('RubyStats') 8910461SAndreas.Sandberg@ARM.com 9010461SAndreas.Sandberg@ARM.comCompoundFlag('Ruby', [ 'RubyQueue', 'RubyNetwork', 'RubyTester', 9110461SAndreas.Sandberg@ARM.com 'RubyGenerated', 'RubySlicc', 'RubySystem', 'RubyCache', 9210461SAndreas.Sandberg@ARM.com 'RubyMemory', 'RubyDma', 'RubyPort', 'RubySequencer', 'RubyCacheTrace']) 9310461SAndreas.Sandberg@ARM.com