1# Copyright (c) 2016 Advanced Micro Devices, Inc.
2# All rights reserved.
3#
4# For use for simulation and test purposes only
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31#
32# Authors: Anthony Gutierrez
33
34from m5.params import *
35
36class GPUStaticInstFlags(Enum):
37    wrapper_name = 'GPUStaticInstFlags'
38    wrapper_is_struct = True
39    enum_name = 'Flags'
40
41    vals = [
42        # Op types
43        'ALU',               # ALU op
44        'Branch',            # Branch instruction
45        'Nop',               # No-op (no effect at all)
46        'Return',            # Return instruction
47        'UnconditionalJump', #
48        'SpecialOp',         # Special op
49        'Waitcnt',           # Is a waitcnt instruction
50
51        # Memory ops
52        'MemBarrier',        # Barrier instruction
53        'MemFence',          # Memory fence instruction
54        'MemoryRef',         # References memory (load, store, or atomic)
55        'Flat',              # Flat memory op
56        'Load',              # Reads from memory
57        'Store',             # Writes to memory
58
59        # Atomic ops
60        'AtomicReturn',      # Atomic instruction that returns data
61        'AtomicNoReturn',    # Atomic instruction that doesn't return data
62
63        # Instruction attributes
64        'Scalar',            # A scalar (not vector) operation
65        'ReadsSCC',          # The instruction reads SCC
66        'WritesSCC',         # The instruction writes SCC
67        'ReadsVCC',          # The instruction reads VCC
68        'WritesVCC',         # The instruction writes VCC
69
70        # Atomic OP types
71        'AtomicAnd',
72        'AtomicOr',
73        'AtomicXor',
74        'AtomicCAS',
75        'AtomicExch',
76        'AtomicAdd',
77        'AtomicSub',
78        'AtomicInc',
79        'AtomicDec',
80        'AtomicMax',
81        'AtomicMin',
82
83        # Memory order flags
84        'RelaxedOrder',
85        'Acquire',           # Has acquire semantics
86        'Release',           # Has release semantics
87        'AcquireRelease',    # Has acquire and release semantics
88        'NoOrder',           # Has no ordering restrictions
89
90        # Segment access flags
91        'ArgSegment',        # Accesses the arg segment
92        'GlobalSegment',     # Accesses global memory
93        'GroupSegment',      # Accesses local memory (LDS), aka shared memory
94        'KernArgSegment',    # Accesses the kernel argument segment
95        'PrivateSegment',    # Accesses the private segment
96        'ReadOnlySegment',   # Accesses read only memory
97        'SpillSegment',      # Accesses the spill segment
98        'NoSegment',         # Does not have an associated segment
99
100        # Scope flags
101        'WorkitemScope',
102        'WavefrontScope',
103        'WorkgroupScope',
104        'DeviceScope',
105        'SystemScope',
106        'NoScope',           # Does not have an associated scope
107
108        # Coherence flags
109        'GloballyCoherent',  # Coherent with other workitems on same device
110        'SystemCoherent'     # Coherent with a different device, or the host
111        ]
112