pc.cc revision 5643
15389Sgblack@eecs.umich.edu/* 25446Sgblack@eecs.umich.edu * Copyright (c) 2008 The Regents of The University of Michigan 35389Sgblack@eecs.umich.edu * All rights reserved. 45389Sgblack@eecs.umich.edu * 55389Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 65389Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 75389Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 85389Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 95389Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 105389Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 115389Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 125389Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 135389Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 145389Sgblack@eecs.umich.edu * this software without specific prior written permission. 155389Sgblack@eecs.umich.edu * 165389Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 175389Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 185389Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 195389Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 205389Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 215389Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 225389Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 235389Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 245389Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 255389Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 265389Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 275389Sgblack@eecs.umich.edu * 285389Sgblack@eecs.umich.edu * Authors: Gabe Black 295389Sgblack@eecs.umich.edu */ 305389Sgblack@eecs.umich.edu 315389Sgblack@eecs.umich.edu/** @file 325389Sgblack@eecs.umich.edu * Implementation of PC platform. 335389Sgblack@eecs.umich.edu */ 345389Sgblack@eecs.umich.edu 355389Sgblack@eecs.umich.edu#include <deque> 365389Sgblack@eecs.umich.edu#include <string> 375389Sgblack@eecs.umich.edu#include <vector> 385389Sgblack@eecs.umich.edu 395389Sgblack@eecs.umich.edu#include "arch/x86/x86_traits.hh" 405389Sgblack@eecs.umich.edu#include "cpu/intr_control.hh" 415478Snate@binkert.org#include "dev/terminal.hh" 425643Sgblack@eecs.umich.edu#include "dev/x86/i82094aa.hh" 435636Sgblack@eecs.umich.edu#include "dev/x86/i8254.hh" 445389Sgblack@eecs.umich.edu#include "dev/x86/pc.hh" 455637Sgblack@eecs.umich.edu#include "dev/x86/south_bridge.hh" 465389Sgblack@eecs.umich.edu#include "sim/system.hh" 475389Sgblack@eecs.umich.edu 485389Sgblack@eecs.umich.eduusing namespace std; 495389Sgblack@eecs.umich.eduusing namespace TheISA; 505389Sgblack@eecs.umich.edu 515638Sgblack@eecs.umich.eduPc::Pc(const Params *p) 525389Sgblack@eecs.umich.edu : Platform(p), system(p->system) 535389Sgblack@eecs.umich.edu{ 545446Sgblack@eecs.umich.edu southBridge = NULL; 555389Sgblack@eecs.umich.edu // set the back pointer from the system to myself 565389Sgblack@eecs.umich.edu system->platform = this; 575389Sgblack@eecs.umich.edu} 585389Sgblack@eecs.umich.edu 595446Sgblack@eecs.umich.eduvoid 605638Sgblack@eecs.umich.eduPc::init() 615446Sgblack@eecs.umich.edu{ 625446Sgblack@eecs.umich.edu assert(southBridge); 635643Sgblack@eecs.umich.edu 645643Sgblack@eecs.umich.edu /* 655643Sgblack@eecs.umich.edu * Initialize the timer. 665643Sgblack@eecs.umich.edu */ 675636Sgblack@eecs.umich.edu I8254 & timer = *southBridge->pit; 685446Sgblack@eecs.umich.edu //Timer 0, mode 2, no bcd, 16 bit count 695446Sgblack@eecs.umich.edu timer.writeControl(0x34); 705446Sgblack@eecs.umich.edu //Timer 0, latch command 715446Sgblack@eecs.umich.edu timer.writeControl(0x00); 725446Sgblack@eecs.umich.edu //Write a 16 bit count of 0 735635Sgblack@eecs.umich.edu timer.writeCounter(0, 0); 745635Sgblack@eecs.umich.edu timer.writeCounter(0, 0); 755643Sgblack@eecs.umich.edu 765643Sgblack@eecs.umich.edu /* 775643Sgblack@eecs.umich.edu * Initialize the I/O APIC. 785643Sgblack@eecs.umich.edu */ 795643Sgblack@eecs.umich.edu I82094AA & ioApic = *southBridge->ioApic; 805643Sgblack@eecs.umich.edu I82094AA::RedirTableEntry entry = 0; 815643Sgblack@eecs.umich.edu entry.deliveryMode = 0x7; 825643Sgblack@eecs.umich.edu entry.vector = 0x20; 835643Sgblack@eecs.umich.edu ioApic.writeReg(0x10, entry.bottomDW); 845643Sgblack@eecs.umich.edu ioApic.writeReg(0x11, entry.topDW); 855446Sgblack@eecs.umich.edu} 865446Sgblack@eecs.umich.edu 875389Sgblack@eecs.umich.eduTick 885638Sgblack@eecs.umich.eduPc::intrFrequency() 895389Sgblack@eecs.umich.edu{ 905389Sgblack@eecs.umich.edu panic("Need implementation\n"); 915389Sgblack@eecs.umich.edu M5_DUMMY_RETURN 925389Sgblack@eecs.umich.edu} 935389Sgblack@eecs.umich.edu 945389Sgblack@eecs.umich.eduvoid 955638Sgblack@eecs.umich.eduPc::postConsoleInt() 965389Sgblack@eecs.umich.edu{ 975389Sgblack@eecs.umich.edu warn_once("Don't know what interrupt to post for console.\n"); 985389Sgblack@eecs.umich.edu //panic("Need implementation\n"); 995389Sgblack@eecs.umich.edu} 1005389Sgblack@eecs.umich.edu 1015389Sgblack@eecs.umich.eduvoid 1025638Sgblack@eecs.umich.eduPc::clearConsoleInt() 1035389Sgblack@eecs.umich.edu{ 1045389Sgblack@eecs.umich.edu warn_once("Don't know what interrupt to clear for console.\n"); 1055389Sgblack@eecs.umich.edu //panic("Need implementation\n"); 1065389Sgblack@eecs.umich.edu} 1075389Sgblack@eecs.umich.edu 1085389Sgblack@eecs.umich.eduvoid 1095638Sgblack@eecs.umich.eduPc::postPciInt(int line) 1105389Sgblack@eecs.umich.edu{ 1115389Sgblack@eecs.umich.edu panic("Need implementation\n"); 1125389Sgblack@eecs.umich.edu} 1135389Sgblack@eecs.umich.edu 1145389Sgblack@eecs.umich.eduvoid 1155638Sgblack@eecs.umich.eduPc::clearPciInt(int line) 1165389Sgblack@eecs.umich.edu{ 1175389Sgblack@eecs.umich.edu panic("Need implementation\n"); 1185389Sgblack@eecs.umich.edu} 1195389Sgblack@eecs.umich.edu 1205389Sgblack@eecs.umich.eduAddr 1215638Sgblack@eecs.umich.eduPc::pciToDma(Addr pciAddr) const 1225389Sgblack@eecs.umich.edu{ 1235389Sgblack@eecs.umich.edu panic("Need implementation\n"); 1245389Sgblack@eecs.umich.edu M5_DUMMY_RETURN 1255389Sgblack@eecs.umich.edu} 1265389Sgblack@eecs.umich.edu 1275389Sgblack@eecs.umich.edu 1285389Sgblack@eecs.umich.eduAddr 1295638Sgblack@eecs.umich.eduPc::calcConfigAddr(int bus, int dev, int func) 1305389Sgblack@eecs.umich.edu{ 1315389Sgblack@eecs.umich.edu assert(func < 8); 1325389Sgblack@eecs.umich.edu assert(dev < 32); 1335389Sgblack@eecs.umich.edu assert(bus == 0); 1345389Sgblack@eecs.umich.edu return (PhysAddrPrefixPciConfig | (func << 8) | (dev << 11)); 1355389Sgblack@eecs.umich.edu} 1365389Sgblack@eecs.umich.edu 1375638Sgblack@eecs.umich.eduPc * 1385638Sgblack@eecs.umich.eduPcParams::create() 1395389Sgblack@eecs.umich.edu{ 1405638Sgblack@eecs.umich.edu return new Pc(this); 1415389Sgblack@eecs.umich.edu} 142