t1000.cc revision 8739:925f15f96322 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 */
30
31/** @file
32 * Implementation of T1000 platform.
33 */
34
35#include <deque>
36#include <string>
37#include <vector>
38
39#include "config/the_isa.hh"
40#include "cpu/intr_control.hh"
41#include "dev/sparc/t1000.hh"
42#include "dev/terminal.hh"
43#include "sim/system.hh"
44
45using namespace std;
46//Should this be AlphaISA?
47using namespace TheISA;
48
49T1000::T1000(const Params *p)
50    : Platform(p), system(p->system)
51{
52#if FULL_SYSTEM //XXX No platform pointer on system objects in SE mode.
53    // set the back pointer from the system to myself
54    system->platform = this;
55#endif
56}
57
58Tick
59T1000::intrFrequency()
60{
61    panic("Need implementation\n");
62    M5_DUMMY_RETURN
63}
64
65void
66T1000::postConsoleInt()
67{
68    warn_once("Don't know what interrupt to post for console.\n");
69    //panic("Need implementation\n");
70}
71
72void
73T1000::clearConsoleInt()
74{
75    warn_once("Don't know what interrupt to clear for console.\n");
76    //panic("Need implementation\n");
77}
78
79void
80T1000::postPciInt(int line)
81{
82    panic("Need implementation\n");
83}
84
85void
86T1000::clearPciInt(int line)
87{
88    panic("Need implementation\n");
89}
90
91Addr
92T1000::pciToDma(Addr pciAddr) const
93{
94    panic("Need implementation\n");
95    M5_DUMMY_RETURN
96}
97
98
99Addr
100T1000::calcPciConfigAddr(int bus, int dev, int func)
101{
102    panic("Need implementation\n");
103    M5_DUMMY_RETURN
104}
105
106Addr
107T1000::calcPciIOAddr(Addr addr)
108{
109    panic("Need implementation\n");
110    M5_DUMMY_RETURN
111}
112
113Addr
114T1000::calcPciMemAddr(Addr addr)
115{
116    panic("Need implementation\n");
117    M5_DUMMY_RETURN
118}
119
120T1000 *
121T1000Params::create()
122{
123    return new T1000(this);
124}
125