1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 */
30
31/** @file
32 * Implementation of T1000 platform.
33 */
34
35#include "dev/sparc/t1000.hh"
36
37#include <deque>
38#include <string>
39#include <vector>
40
41#include "cpu/intr_control.hh"
42#include "sim/system.hh"
43
44using namespace std;
45
46T1000::T1000(const Params *p)
47    : Platform(p), system(p->system)
48{}
49
50void
51T1000::postConsoleInt()
52{
53    warn_once("Don't know what interrupt to post for console.\n");
54    //panic("Need implementation\n");
55}
56
57void
58T1000::clearConsoleInt()
59{
60    warn_once("Don't know what interrupt to clear for console.\n");
61    //panic("Need implementation\n");
62}
63
64void
65T1000::postPciInt(int line)
66{
67    panic("Need implementation\n");
68}
69
70void
71T1000::clearPciInt(int line)
72{
73    panic("Need implementation\n");
74}
75
76Addr
77T1000::pciToDma(Addr pciAddr) const
78{
79    panic("Need implementation\n");
80    M5_DUMMY_RETURN
81}
82
83
84Addr
85T1000::calcPciConfigAddr(int bus, int dev, int func)
86{
87    panic("Need implementation\n");
88    M5_DUMMY_RETURN
89}
90
91Addr
92T1000::calcPciIOAddr(Addr addr)
93{
94    panic("Need implementation\n");
95    M5_DUMMY_RETURN
96}
97
98Addr
99T1000::calcPciMemAddr(Addr addr)
100{
101    panic("Need implementation\n");
102    M5_DUMMY_RETURN
103}
104
105T1000 *
106T1000Params::create()
107{
108    return new T1000(this);
109}
110