t1000.cc revision 12239:ae1686aaebc5 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 */
30
31/** @file
32 * Implementation of T1000 platform.
33 */
34
35#include "dev/sparc/t1000.hh"
36
37#include <deque>
38#include <string>
39#include <vector>
40
41#include "config/the_isa.hh"
42#include "cpu/intr_control.hh"
43#include "sim/system.hh"
44
45using namespace std;
46//Should this be AlphaISA?
47using namespace TheISA;
48
49T1000::T1000(const Params *p)
50    : Platform(p), system(p->system)
51{}
52
53void
54T1000::postConsoleInt()
55{
56    warn_once("Don't know what interrupt to post for console.\n");
57    //panic("Need implementation\n");
58}
59
60void
61T1000::clearConsoleInt()
62{
63    warn_once("Don't know what interrupt to clear for console.\n");
64    //panic("Need implementation\n");
65}
66
67void
68T1000::postPciInt(int line)
69{
70    panic("Need implementation\n");
71}
72
73void
74T1000::clearPciInt(int line)
75{
76    panic("Need implementation\n");
77}
78
79Addr
80T1000::pciToDma(Addr pciAddr) const
81{
82    panic("Need implementation\n");
83    M5_DUMMY_RETURN
84}
85
86
87Addr
88T1000::calcPciConfigAddr(int bus, int dev, int func)
89{
90    panic("Need implementation\n");
91    M5_DUMMY_RETURN
92}
93
94Addr
95T1000::calcPciIOAddr(Addr addr)
96{
97    panic("Need implementation\n");
98    M5_DUMMY_RETURN
99}
100
101Addr
102T1000::calcPciMemAddr(Addr addr)
103{
104    panic("Need implementation\n");
105    M5_DUMMY_RETURN
106}
107
108T1000 *
109T1000Params::create()
110{
111    return new T1000(this);
112}
113