platform.hh revision 2665
1807SN/A/*
21762SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan
3807SN/A * All rights reserved.
4807SN/A *
5807SN/A * Redistribution and use in source and binary forms, with or without
6807SN/A * modification, are permitted provided that the following conditions are
7807SN/A * met: redistributions of source code must retain the above copyright
8807SN/A * notice, this list of conditions and the following disclaimer;
9807SN/A * redistributions in binary form must reproduce the above copyright
10807SN/A * notice, this list of conditions and the following disclaimer in the
11807SN/A * documentation and/or other materials provided with the distribution;
12807SN/A * neither the name of the copyright holders nor the names of its
13807SN/A * contributors may be used to endorse or promote products derived from
14807SN/A * this software without specific prior written permission.
15807SN/A *
16807SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17807SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18807SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19807SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20807SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21807SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22807SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23807SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24807SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25807SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26807SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Andrew Schultz
29807SN/A */
30807SN/A
31807SN/A/**
32807SN/A * @file
33807SN/A * Generic interface for platforms
34807SN/A */
35807SN/A
361634SN/A#ifndef __DEV_PLATFORM_HH__
371634SN/A#define __DEV_PLATFORM_HH__
38807SN/A
39807SN/A#include "sim/sim_object.hh"
402080SN/A#include "arch/isa_traits.hh"
41807SN/A
42849SN/Aclass PciConfigAll;
43807SN/Aclass IntrControl;
44807SN/Aclass SimConsole;
45932SN/Aclass Uart;
462384SN/Aclass System;
47807SN/A
48807SN/Aclass Platform : public SimObject
49807SN/A{
50807SN/A  public:
51807SN/A    /** Pointer to the interrupt controller */
52807SN/A    IntrControl *intrctrl;
531634SN/A
54849SN/A    /** Pointer to the PCI configuration space */
55849SN/A    PciConfigAll *pciconfig;
56807SN/A
57932SN/A    /** Pointer to the UART, set by the uart */
58932SN/A    Uart *uart;
59932SN/A
602384SN/A    /** Pointer to the system for info about the memory system. */
612384SN/A    System *system;
622384SN/A
63807SN/A  public:
642542SN/A    Platform(const std::string &name, IntrControl *intctrl);
651634SN/A    virtual ~Platform();
662542SN/A    virtual void init() { if (pciconfig == NULL) panic("PCI Config not set"); }
67865SN/A    virtual void postConsoleInt() = 0;
68865SN/A    virtual void clearConsoleInt() = 0;
69891SN/A    virtual Tick intrFrequency() = 0;
701149SN/A    virtual void postPciInt(int line);
711149SN/A    virtual void clearPciInt(int line);
721149SN/A    virtual Addr pciToDma(Addr pciAddr) const;
73807SN/A};
74807SN/A
751634SN/A#endif // __DEV_PLATFORM_HH__
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