platform.hh revision 2384 
15222Sksewell@umich.edu/*
25222Sksewell@umich.edu * Copyright (c) 2004-2005 The Regents of The University of Michigan
35222Sksewell@umich.edu * All rights reserved.
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65222Sksewell@umich.edu * modification, are permitted provided that the following conditions are
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275222Sksewell@umich.edu */
285222Sksewell@umich.edu
295222Sksewell@umich.edu/**
305222Sksewell@umich.edu * @file
315222Sksewell@umich.edu * Generic interface for platforms
325222Sksewell@umich.edu */
335222Sksewell@umich.edu
345222Sksewell@umich.edu#ifndef __DEV_PLATFORM_HH__
355222Sksewell@umich.edu#define __DEV_PLATFORM_HH__
365222Sksewell@umich.edu
375222Sksewell@umich.edu#include "sim/sim_object.hh"
385222Sksewell@umich.edu#include "targetarch/isa_traits.hh"
395222Sksewell@umich.edu
405222Sksewell@umich.educlass PciConfigAll;
415222Sksewell@umich.educlass IntrControl;
425222Sksewell@umich.educlass SimConsole;
435222Sksewell@umich.educlass Uart;
445222Sksewell@umich.educlass System;
455222Sksewell@umich.edu
465222Sksewell@umich.educlass Platform : public SimObject
475222Sksewell@umich.edu{
485222Sksewell@umich.edu  public:
495222Sksewell@umich.edu    /** Pointer to the interrupt controller */
505222Sksewell@umich.edu    IntrControl *intrctrl;
515222Sksewell@umich.edu
525222Sksewell@umich.edu    /** Pointer to the PCI configuration space */
53    PciConfigAll *pciconfig;
54
55    /** Pointer to the UART, set by the uart */
56    Uart *uart;
57
58    /** Pointer to the system for info about the memory system. */
59    System *system;
60
61  public:
62    Platform(const std::string &name, IntrControl *intctrl, PciConfigAll *pci);
63    virtual ~Platform();
64    virtual void postConsoleInt() = 0;
65    virtual void clearConsoleInt() = 0;
66    virtual Tick intrFrequency() = 0;
67    virtual void postPciInt(int line);
68    virtual void clearPciInt(int line);
69    virtual Addr pciToDma(Addr pciAddr) const;
70};
71
72#endif // __DEV_PLATFORM_HH__
73