device.hh revision 1817
11689SN/A/*
212106SRekai.GonzalezAlberquilla@arm.com * Copyright (c) 2004-2005 The Regents of The University of Michigan
39913Ssteve.reinhardt@amd.com * All rights reserved.
47854SAli.Saidi@ARM.com *
57854SAli.Saidi@ARM.com * Redistribution and use in source and binary forms, with or without
67854SAli.Saidi@ARM.com * modification, are permitted provided that the following conditions are
77854SAli.Saidi@ARM.com * met: redistributions of source code must retain the above copyright
87854SAli.Saidi@ARM.com * notice, this list of conditions and the following disclaimer;
97854SAli.Saidi@ARM.com * redistributions in binary form must reproduce the above copyright
107854SAli.Saidi@ARM.com * notice, this list of conditions and the following disclaimer in the
117854SAli.Saidi@ARM.com * documentation and/or other materials provided with the distribution;
127854SAli.Saidi@ARM.com * neither the name of the copyright holders nor the names of its
137854SAli.Saidi@ARM.com * contributors may be used to endorse or promote products derived from
147854SAli.Saidi@ARM.com * this software without specific prior written permission.
152329SN/A *
161689SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
171689SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
181689SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
191689SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
201689SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
211689SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
221689SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
231689SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
241689SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
251689SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
261689SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
271689SN/A */
281689SN/A
291689SN/A/* @file
301689SN/A * Interface for devices using PCI configuration
311689SN/A */
321689SN/A
331689SN/A#ifndef __DEV_PCIDEV_HH__
341689SN/A#define __DEV_PCIDEV_HH__
351689SN/A
361689SN/A#include "dev/io_device.hh"
371689SN/A#include "dev/pcireg.h"
381689SN/A#include "dev/platform.hh"
391689SN/A
402665Ssaidi@eecs.umich.edu#define BAR_IO_MASK 0x3
412665Ssaidi@eecs.umich.edu#define BAR_MEM_MASK 0xF
422935Sksewell@umich.edu#define BAR_IO_SPACE_BIT 0x1
431689SN/A#define BAR_IO_SPACE(x) ((x) & BAR_IO_SPACE_BIT)
441689SN/A#define BAR_NUMBER(x) (((x) - PCI0_BASE_ADDR0) >> 0x2);
459944Smatt.horsnell@ARM.com
469944Smatt.horsnell@ARM.comclass PciConfigAll;
479944Smatt.horsnell@ARM.comclass MemoryController;
481060SN/A
491060SN/A
503773Sgblack@eecs.umich.edu/**
516329Sgblack@eecs.umich.edu * This class encapulates the first 64 bytes of a singles PCI
526658Snate@binkert.org * devices config space that in configured by the configuration file.
531717SN/A */
549913Ssteve.reinhardt@amd.comclass PciConfigData : public SimObject
558232Snate@binkert.org{
568232Snate@binkert.org  public:
579527SMatt.Horsnell@arm.com    /**
585529Snate@binkert.org     * Constructor to initialize the devices config space to 0.
591060SN/A     */
606221Snate@binkert.org    PciConfigData(const std::string &name)
616221Snate@binkert.org        : SimObject(name)
621061SN/A    {
635529Snate@binkert.org        memset(config.data, 0, sizeof(config.data));
644329Sktlim@umich.edu        memset(BARAddrs, 0, sizeof(BARAddrs));
654329Sktlim@umich.edu        memset(BARSize, 0, sizeof(BARSize));
662292SN/A    }
672292SN/A
682292SN/A    /** The first 64 bytes */
692292SN/A    PCIConfig config;
7012109SRekai.GonzalezAlberquilla@arm.com
711060SN/A    /** The size of the BARs */
7210172Sdam.sunwoo@arm.com    uint32_t BARSize[6];
7310172Sdam.sunwoo@arm.com
7410172Sdam.sunwoo@arm.com    /** The addresses of the BARs */
7510172Sdam.sunwoo@arm.com    Addr BARAddrs[6];
7610172Sdam.sunwoo@arm.com};
772292SN/A
7810328Smitch.hayenga@arm.com/**
7913453Srekai.gonzalezalberquilla@arm.com * PCI device, base implemnation is only config space.
8013453Srekai.gonzalezalberquilla@arm.com * Each device is connected to a PCIConfigSpace device
8113453Srekai.gonzalezalberquilla@arm.com * which returns -1 for everything but the pcidevs that
8213453Srekai.gonzalezalberquilla@arm.com * register with it. This object registers with the PCIConfig space
8313453Srekai.gonzalezalberquilla@arm.com * object.
8413453Srekai.gonzalezalberquilla@arm.com */
8513453Srekai.gonzalezalberquilla@arm.comclass PciDev : public DmaDevice
8613453Srekai.gonzalezalberquilla@arm.com{
8713453Srekai.gonzalezalberquilla@arm.com  public:
8813453Srekai.gonzalezalberquilla@arm.com    struct Params
8913453Srekai.gonzalezalberquilla@arm.com    {
9013453Srekai.gonzalezalberquilla@arm.com        std::string name;
912292SN/A        Platform *plat;
922292SN/A        MemoryController *mmu;
932292SN/A
942292SN/A        /**
952292SN/A         * A pointer to the configspace all object that calls us when
962292SN/A         * a read comes to this particular device/function.
972292SN/A         */
981060SN/A        PciConfigAll *configSpace;
991060SN/A
1001061SN/A        /**
1011060SN/A         * A pointer to the object that contains the first 64 bytes of
1022292SN/A         * config space
1031062SN/A         */
1041062SN/A        PciConfigData *configData;
1058240Snate@binkert.org
1061062SN/A        /** The bus number we are on */
1071062SN/A        uint32_t busNum;
1081062SN/A
1098240Snate@binkert.org        /** The device number we have */
1101062SN/A        uint32_t deviceNum;
1111062SN/A
1121062SN/A        /** The function number */
1138240Snate@binkert.org        uint32_t functionNum;
1141062SN/A    };
1151062SN/A
1162301SN/A  protected:
1178240Snate@binkert.org    Params *_params;
1182301SN/A
1192301SN/A  public:
1202292SN/A    const Params *params() const { return _params; }
1218240Snate@binkert.org
1222292SN/A  protected:
1232292SN/A    /** The current config space. Unlike the PciConfigData this is
1241062SN/A     * updated during simulation while continues to refelect what was
1258240Snate@binkert.org     * in the config file.
1261062SN/A     */
1271062SN/A    PCIConfig config;
1281062SN/A
1298240Snate@binkert.org    /** The size of the BARs */
1301062SN/A    uint32_t BARSize[6];
1311062SN/A
1321062SN/A    /** The current address mapping of the BARs */
1338240Snate@binkert.org    Addr BARAddrs[6];
1341062SN/A
1351062SN/A  protected:
1361062SN/A    Platform *plat;
1378240Snate@binkert.org    PciConfigData *configData;
1382292SN/A
1391062SN/A  public:
1401062SN/A    Addr pciToDma(Addr pciAddr) const
1418240Snate@binkert.org    { return plat->pciToDma(pciAddr); }
1422292SN/A
1431062SN/A    void
14410239Sbinhpham@cs.rutgers.edu    intrPost()
14510239Sbinhpham@cs.rutgers.edu    { plat->postPciInt(configData->config.interruptLine); }
14610239Sbinhpham@cs.rutgers.edu
14710239Sbinhpham@cs.rutgers.edu    void
14810239Sbinhpham@cs.rutgers.edu    intrClear()
14910239Sbinhpham@cs.rutgers.edu    { plat->clearPciInt(configData->config.interruptLine); }
15010239Sbinhpham@cs.rutgers.edu
15110239Sbinhpham@cs.rutgers.edu    uint8_t
1521062SN/A    interruptLine()
1538240Snate@binkert.org    { return configData->config.interruptLine; }
1541062SN/A
1551062SN/A  public:
1561062SN/A    /**
1578240Snate@binkert.org     * Constructor for PCI Dev. This function copies data from the
1581062SN/A     * config file object PCIConfigData and registers the device with
1591062SN/A     * a PciConfigAll object.
1601062SN/A     */
1618240Snate@binkert.org    PciDev(Params *params);
1621062SN/A
1631062SN/A    virtual Fault read(MemReqPtr &req, uint8_t *data) {
1641062SN/A        return No_Fault;
1658240Snate@binkert.org    }
1661062SN/A    virtual Fault write(MemReqPtr &req, const uint8_t *data) {
1671062SN/A        return No_Fault;
1681062SN/A    }
1698240Snate@binkert.org
1701062SN/A    /**
1711062SN/A     * Write to the PCI config space data that is stored locally. This may be
1722301SN/A     * overridden by the device but at some point it will eventually call this
1738240Snate@binkert.org     * for normal operations that it does not need to override.
1742301SN/A     * @param offset the offset into config space
1752301SN/A     * @param size the size of the write
1762301SN/A     * @param data the data to write
1772301SN/A     */
1788240Snate@binkert.org    virtual void writeConfig(int offset, int size, const uint8_t* data);
1792301SN/A
1802301SN/A
1812301SN/A    /**
1822307SN/A     * Read from the PCI config space data that is stored locally. This may be
1838240Snate@binkert.org     * overridden by the device but at some point it will eventually call this
1842307SN/A     * for normal operations that it does not need to override.
1852307SN/A     * @param offset the offset into config space
1862307SN/A     * @param size the size of the read
1877897Shestness@cs.utexas.edu     * @param data pointer to the location where the read value should be stored
1888240Snate@binkert.org     */
1897897Shestness@cs.utexas.edu    virtual void readConfig(int offset, int size, uint8_t *data);
1907897Shestness@cs.utexas.edu
1917897Shestness@cs.utexas.edu    /**
1928240Snate@binkert.org     * Serialize this object to the given output stream.
1937897Shestness@cs.utexas.edu     * @param os The stream to serialize to.
1947897Shestness@cs.utexas.edu     */
19512109SRekai.GonzalezAlberquilla@arm.com    virtual void serialize(std::ostream &os);
19612109SRekai.GonzalezAlberquilla@arm.com
19712109SRekai.GonzalezAlberquilla@arm.com    /**
19812109SRekai.GonzalezAlberquilla@arm.com     * Reconstruct the state of this object from a checkpoint.
19913610Sgiacomo.gabrielli@arm.com     * @param cp The checkpoint use.
20013610Sgiacomo.gabrielli@arm.com     * @param section The section name of this object
20113610Sgiacomo.gabrielli@arm.com     */
20213610Sgiacomo.gabrielli@arm.com    virtual void unserialize(Checkpoint *cp, const std::string &section);
2031062SN/A};
2041062SN/A
2051062SN/A#endif // __DEV_PCIDEV_HH__
2061062SN/A