device.hh revision 1817
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/* @file
30 * Interface for devices using PCI configuration
31 */
32
33#ifndef __DEV_PCIDEV_HH__
34#define __DEV_PCIDEV_HH__
35
36#include "dev/io_device.hh"
37#include "dev/pcireg.h"
38#include "dev/platform.hh"
39
40#define BAR_IO_MASK 0x3
41#define BAR_MEM_MASK 0xF
42#define BAR_IO_SPACE_BIT 0x1
43#define BAR_IO_SPACE(x) ((x) & BAR_IO_SPACE_BIT)
44#define BAR_NUMBER(x) (((x) - PCI0_BASE_ADDR0) >> 0x2);
45
46class PciConfigAll;
47class MemoryController;
48
49
50/**
51 * This class encapulates the first 64 bytes of a singles PCI
52 * devices config space that in configured by the configuration file.
53 */
54class PciConfigData : public SimObject
55{
56  public:
57    /**
58     * Constructor to initialize the devices config space to 0.
59     */
60    PciConfigData(const std::string &name)
61        : SimObject(name)
62    {
63        memset(config.data, 0, sizeof(config.data));
64        memset(BARAddrs, 0, sizeof(BARAddrs));
65        memset(BARSize, 0, sizeof(BARSize));
66    }
67
68    /** The first 64 bytes */
69    PCIConfig config;
70
71    /** The size of the BARs */
72    uint32_t BARSize[6];
73
74    /** The addresses of the BARs */
75    Addr BARAddrs[6];
76};
77
78/**
79 * PCI device, base implemnation is only config space.
80 * Each device is connected to a PCIConfigSpace device
81 * which returns -1 for everything but the pcidevs that
82 * register with it. This object registers with the PCIConfig space
83 * object.
84 */
85class PciDev : public DmaDevice
86{
87  public:
88    struct Params
89    {
90        std::string name;
91        Platform *plat;
92        MemoryController *mmu;
93
94        /**
95         * A pointer to the configspace all object that calls us when
96         * a read comes to this particular device/function.
97         */
98        PciConfigAll *configSpace;
99
100        /**
101         * A pointer to the object that contains the first 64 bytes of
102         * config space
103         */
104        PciConfigData *configData;
105
106        /** The bus number we are on */
107        uint32_t busNum;
108
109        /** The device number we have */
110        uint32_t deviceNum;
111
112        /** The function number */
113        uint32_t functionNum;
114    };
115
116  protected:
117    Params *_params;
118
119  public:
120    const Params *params() const { return _params; }
121
122  protected:
123    /** The current config space. Unlike the PciConfigData this is
124     * updated during simulation while continues to refelect what was
125     * in the config file.
126     */
127    PCIConfig config;
128
129    /** The size of the BARs */
130    uint32_t BARSize[6];
131
132    /** The current address mapping of the BARs */
133    Addr BARAddrs[6];
134
135  protected:
136    Platform *plat;
137    PciConfigData *configData;
138
139  public:
140    Addr pciToDma(Addr pciAddr) const
141    { return plat->pciToDma(pciAddr); }
142
143    void
144    intrPost()
145    { plat->postPciInt(configData->config.interruptLine); }
146
147    void
148    intrClear()
149    { plat->clearPciInt(configData->config.interruptLine); }
150
151    uint8_t
152    interruptLine()
153    { return configData->config.interruptLine; }
154
155  public:
156    /**
157     * Constructor for PCI Dev. This function copies data from the
158     * config file object PCIConfigData and registers the device with
159     * a PciConfigAll object.
160     */
161    PciDev(Params *params);
162
163    virtual Fault read(MemReqPtr &req, uint8_t *data) {
164        return No_Fault;
165    }
166    virtual Fault write(MemReqPtr &req, const uint8_t *data) {
167        return No_Fault;
168    }
169
170    /**
171     * Write to the PCI config space data that is stored locally. This may be
172     * overridden by the device but at some point it will eventually call this
173     * for normal operations that it does not need to override.
174     * @param offset the offset into config space
175     * @param size the size of the write
176     * @param data the data to write
177     */
178    virtual void writeConfig(int offset, int size, const uint8_t* data);
179
180
181    /**
182     * Read from the PCI config space data that is stored locally. This may be
183     * overridden by the device but at some point it will eventually call this
184     * for normal operations that it does not need to override.
185     * @param offset the offset into config space
186     * @param size the size of the read
187     * @param data pointer to the location where the read value should be stored
188     */
189    virtual void readConfig(int offset, int size, uint8_t *data);
190
191    /**
192     * Serialize this object to the given output stream.
193     * @param os The stream to serialize to.
194     */
195    virtual void serialize(std::ostream &os);
196
197    /**
198     * Reconstruct the state of this object from a checkpoint.
199     * @param cp The checkpoint use.
200     * @param section The section name of this object
201     */
202    virtual void unserialize(Checkpoint *cp, const std::string &section);
203};
204
205#endif // __DEV_PCIDEV_HH__
206