isa_fake.cc revision 3357:0963b8a38b5e
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Miguel Serrano 29 * Ali Saidi 30 */ 31 32/** @file 33 * Isa Fake Device implementation 34 */ 35 36#include <deque> 37#include <string> 38#include <vector> 39 40#include "base/trace.hh" 41#include "dev/isa_fake.hh" 42#include "mem/packet.hh" 43#include "mem/packet_access.hh" 44#include "sim/builder.hh" 45#include "sim/system.hh" 46 47using namespace std; 48 49IsaFake::IsaFake(Params *p) 50 : BasicPioDevice(p) 51{ 52 pioSize = p->pio_size; 53} 54 55Tick 56IsaFake::read(PacketPtr pkt) 57{ 58 assert(pkt->result == Packet::Unknown); 59 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 60 61 DPRINTF(Tsunami, "read va=%#x size=%d\n", pkt->getAddr(), pkt->getSize()); 62 63 switch (pkt->getSize()) { 64 case sizeof(uint64_t): 65 pkt->set(0xFFFFFFFFFFFFFFFFULL); 66 break; 67 case sizeof(uint32_t): 68 pkt->set((uint32_t)0xFFFFFFFF); 69 break; 70 case sizeof(uint16_t): 71 pkt->set((uint16_t)0xFFFF); 72 break; 73 case sizeof(uint8_t): 74 pkt->set((uint8_t)0xFF); 75 break; 76 default: 77 panic("invalid access size(?) for PCI configspace!\n"); 78 } 79 pkt->result = Packet::Success; 80 return pioDelay; 81} 82 83Tick 84IsaFake::write(PacketPtr pkt) 85{ 86 DPRINTF(Tsunami, "write - va=%#x size=%d \n", pkt->getAddr(), pkt->getSize()); 87 pkt->result = Packet::Success; 88 return pioDelay; 89} 90 91BEGIN_DECLARE_SIM_OBJECT_PARAMS(IsaFake) 92 93 Param<Addr> pio_addr; 94 Param<Tick> pio_latency; 95 Param<Addr> pio_size; 96 SimObjectParam<Platform *> platform; 97 SimObjectParam<System *> system; 98 99END_DECLARE_SIM_OBJECT_PARAMS(IsaFake) 100 101BEGIN_INIT_SIM_OBJECT_PARAMS(IsaFake) 102 103 INIT_PARAM(pio_addr, "Device Address"), 104 INIT_PARAM(pio_latency, "Programmed IO latency"), 105 INIT_PARAM(pio_size, "Size of address range"), 106 INIT_PARAM(platform, "platform"), 107 INIT_PARAM(system, "system object") 108 109END_INIT_SIM_OBJECT_PARAMS(IsaFake) 110 111CREATE_SIM_OBJECT(IsaFake) 112{ 113 IsaFake::Params *p = new IsaFake::Params; 114 p->name = getInstanceName(); 115 p->pio_addr = pio_addr; 116 p->pio_delay = pio_latency; 117 p->pio_size = pio_size; 118 p->platform = platform; 119 p->system = system; 120 return new IsaFake(p); 121} 122 123REGISTER_SIM_OBJECT("IsaFake", IsaFake) 124