isa_fake.cc revision 10415:85274f24c37a
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ali Saidi 29 */ 30 31/** @file 32 * Isa Fake Device implementation 33 */ 34 35#include "base/trace.hh" 36#include "debug/IsaFake.hh" 37#include "dev/isa_fake.hh" 38#include "mem/packet.hh" 39#include "mem/packet_access.hh" 40#include "sim/system.hh" 41 42using namespace std; 43 44IsaFake::IsaFake(Params *p) 45 : BasicPioDevice(p, p->ret_bad_addr ? 0 : p->pio_size) 46{ 47 retData8 = p->ret_data8; 48 retData16 = p->ret_data16; 49 retData32 = p->ret_data32; 50 retData64 = p->ret_data64; 51} 52 53Tick 54IsaFake::read(PacketPtr pkt) 55{ 56 pkt->allocate(); 57 pkt->makeAtomicResponse(); 58 59 if (params()->warn_access != "") 60 warn("Device %s accessed by read to address %#x size=%d\n", 61 name(), pkt->getAddr(), pkt->getSize()); 62 if (params()->ret_bad_addr) { 63 DPRINTF(IsaFake, "read to bad address va=%#x size=%d\n", 64 pkt->getAddr(), pkt->getSize()); 65 pkt->setBadAddress(); 66 } else { 67 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 68 DPRINTF(IsaFake, "read va=%#x size=%d\n", 69 pkt->getAddr(), pkt->getSize()); 70 switch (pkt->getSize()) { 71 case sizeof(uint64_t): 72 pkt->set(retData64); 73 break; 74 case sizeof(uint32_t): 75 pkt->set(retData32); 76 break; 77 case sizeof(uint16_t): 78 pkt->set(retData16); 79 break; 80 case sizeof(uint8_t): 81 pkt->set(retData8); 82 break; 83 default: 84 if (params()->fake_mem) 85 std::memset(pkt->getPtr<uint8_t>(), 0, pkt->getSize()); 86 else 87 panic("invalid access size! Device being accessed by cache?\n"); 88 } 89 } 90 return pioDelay; 91} 92 93Tick 94IsaFake::write(PacketPtr pkt) 95{ 96 pkt->makeAtomicResponse(); 97 if (params()->warn_access != "") { 98 uint64_t data; 99 switch (pkt->getSize()) { 100 case sizeof(uint64_t): 101 data = pkt->get<uint64_t>(); 102 break; 103 case sizeof(uint32_t): 104 data = pkt->get<uint32_t>(); 105 break; 106 case sizeof(uint16_t): 107 data = pkt->get<uint16_t>(); 108 break; 109 case sizeof(uint8_t): 110 data = pkt->get<uint8_t>(); 111 break; 112 default: 113 panic("invalid access size: %u\n", pkt->getSize()); 114 } 115 warn("Device %s accessed by write to address %#x size=%d data=%#x\n", 116 name(), pkt->getAddr(), pkt->getSize(), data); 117 } 118 if (params()->ret_bad_addr) { 119 DPRINTF(IsaFake, "write to bad address va=%#x size=%d \n", 120 pkt->getAddr(), pkt->getSize()); 121 pkt->setBadAddress(); 122 } else { 123 DPRINTF(IsaFake, "write - va=%#x size=%d \n", 124 pkt->getAddr(), pkt->getSize()); 125 126 if (params()->update_data) { 127 switch (pkt->getSize()) { 128 case sizeof(uint64_t): 129 retData64 = pkt->get<uint64_t>(); 130 break; 131 case sizeof(uint32_t): 132 retData32 = pkt->get<uint32_t>(); 133 break; 134 case sizeof(uint16_t): 135 retData16 = pkt->get<uint16_t>(); 136 break; 137 case sizeof(uint8_t): 138 retData8 = pkt->get<uint8_t>(); 139 break; 140 default: 141 panic("invalid access size!\n"); 142 } 143 } 144 } 145 return pioDelay; 146} 147 148IsaFake * 149IsaFakeParams::create() 150{ 151 return new IsaFake(this); 152} 153