tsunami_io.hh revision 932
1955SN/A/*
2955SN/A * Copyright (c) 2004 The Regents of The University of Michigan
313576Sciro.santilli@arm.com * All rights reserved.
413576Sciro.santilli@arm.com *
513576Sciro.santilli@arm.com * Redistribution and use in source and binary forms, with or without
613576Sciro.santilli@arm.com * modification, are permitted provided that the following conditions are
713576Sciro.santilli@arm.com * met: redistributions of source code must retain the above copyright
813576Sciro.santilli@arm.com * notice, this list of conditions and the following disclaimer;
913576Sciro.santilli@arm.com * redistributions in binary form must reproduce the above copyright
1013576Sciro.santilli@arm.com * notice, this list of conditions and the following disclaimer in the
1113576Sciro.santilli@arm.com * documentation and/or other materials provided with the distribution;
1213576Sciro.santilli@arm.com * neither the name of the copyright holders nor the names of its
1313576Sciro.santilli@arm.com * contributors may be used to endorse or promote products derived from
141762SN/A * this software without specific prior written permission.
15955SN/A *
16955SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17955SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18955SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19955SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20955SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21955SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22955SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23955SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24955SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25955SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26955SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27955SN/A */
28955SN/A
29955SN/A/* @file
30955SN/A * Tsunami Fake I/O Space mapping including RTC/timer interrupts
31955SN/A */
32955SN/A
33955SN/A#ifndef __TSUNAMI_DMA_HH__
34955SN/A#define __TSUNAMI_DMA_HH__
35955SN/A
36955SN/A#include "dev/io_device.hh"
37955SN/A#include "base/range.hh"
38955SN/A#include "dev/tsunami.hh"
392665Ssaidi@eecs.umich.edu#include "sim/eventq.hh"
404762Snate@binkert.org
41955SN/A/** How often the RTC interrupts */
4212563Sgabeblack@google.comstatic const int RTC_RATE  = 1024;
4312563Sgabeblack@google.com
445522Snate@binkert.org/*
456143Snate@binkert.org * Tsunami I/O device is a catch all for all the south bridge stuff we care
4612371Sgabeblack@google.com * to implement.
474762Snate@binkert.org */
485522Snate@binkert.orgclass TsunamiIO : public PioDevice
49955SN/A{
505522Snate@binkert.org  private:
5111974Sgabeblack@google.com    /** The base address of this device */
52955SN/A    Addr addr;
535522Snate@binkert.org
544202Sbinkertn@umich.edu    /** The size of mappad from the above address */
555742Snate@binkert.org    static const Addr size = 0xff;
56955SN/A
574381Sbinkertn@umich.edu    struct tm tm;
584381Sbinkertn@umich.edu
5912246Sgabeblack@google.com    /** In Tsunami RTC only has two i/o ports one for data and one for address,
6012246Sgabeblack@google.com     * so you write the address and then read/write the data. This store the
618334Snate@binkert.org     * address you are going to be reading from on a read.
62955SN/A     */
63955SN/A    uint8_t RTCAddress;
644202Sbinkertn@umich.edu
65955SN/A  protected:
664382Sbinkertn@umich.edu
674382Sbinkertn@umich.edu    /**
684382Sbinkertn@umich.edu     * The ClockEvent is handles the PIT interrupts
696654Snate@binkert.org     */
705517Snate@binkert.org    class ClockEvent : public Event
718614Sgblack@eecs.umich.edu    {
727674Snate@binkert.org      protected:
736143Snate@binkert.org        /** how often the PIT fires */
746143Snate@binkert.org        Tick interval;
756143Snate@binkert.org        /** The mode of the PIT */
7612302Sgabeblack@google.com        uint8_t mode;
7712302Sgabeblack@google.com        /** The status of the PIT */
7812302Sgabeblack@google.com        uint8_t status;
7912371Sgabeblack@google.com
8012371Sgabeblack@google.com      public:
8112371Sgabeblack@google.com        /**
8212371Sgabeblack@google.com         * Just set the mode to 0
8312371Sgabeblack@google.com         */
8412371Sgabeblack@google.com        ClockEvent();
8512371Sgabeblack@google.com
8612371Sgabeblack@google.com        /**
8712371Sgabeblack@google.com         * processs the timer event
8812371Sgabeblack@google.com         */
8912371Sgabeblack@google.com        virtual void process();
9012371Sgabeblack@google.com
9112371Sgabeblack@google.com        /**
9212371Sgabeblack@google.com         * Returns a description of this event
9312371Sgabeblack@google.com         * @return the description
9412371Sgabeblack@google.com         */
9512371Sgabeblack@google.com        virtual const char *description();
9612371Sgabeblack@google.com
9712371Sgabeblack@google.com        /**
9812371Sgabeblack@google.com         * Schedule a timer interrupt to occur sometime in the future.
9912371Sgabeblack@google.com         */
10012371Sgabeblack@google.com        void Program(int count);
10112371Sgabeblack@google.com
10212371Sgabeblack@google.com        /**
10312371Sgabeblack@google.com         * Write the mode bits of the PIT.
10412371Sgabeblack@google.com         * @param mode the new mode
10512371Sgabeblack@google.com         */
10612371Sgabeblack@google.com        void ChangeMode(uint8_t mode);
10712371Sgabeblack@google.com
10812371Sgabeblack@google.com        /**
10912371Sgabeblack@google.com         * The current PIT status.
11012371Sgabeblack@google.com         * @return the status of the PIT
11112371Sgabeblack@google.com         */
11212371Sgabeblack@google.com        uint8_t Status();
11312371Sgabeblack@google.com
11412371Sgabeblack@google.com        /**
11512371Sgabeblack@google.com         * Serialize this object to the given output stream.
11612371Sgabeblack@google.com         * @param os The stream to serialize to.
11712371Sgabeblack@google.com         */
11812371Sgabeblack@google.com        virtual void serialize(std::ostream &os);
11912371Sgabeblack@google.com
12012371Sgabeblack@google.com
12112371Sgabeblack@google.com        /**
12212371Sgabeblack@google.com         * Reconstruct the state of this object from a checkpoint.
12312371Sgabeblack@google.com         * @param cp The checkpoint use.
12412371Sgabeblack@google.com         * @param section The section name of this object
12512371Sgabeblack@google.com         */
12612302Sgabeblack@google.com        virtual void unserialize(Checkpoint *cp, const std::string &section);
12712371Sgabeblack@google.com     };
12812302Sgabeblack@google.com
12912371Sgabeblack@google.com    /**
13012302Sgabeblack@google.com     * Process RTC timer events and generate interrupts appropriately.
13112302Sgabeblack@google.com     */
13212371Sgabeblack@google.com    class RTCEvent : public Event
13312371Sgabeblack@google.com    {
13412371Sgabeblack@google.com      protected:
13512371Sgabeblack@google.com          /** A pointer back to tsunami to create interrupt the processor. */
13612302Sgabeblack@google.com          Tsunami* tsunami;
13712371Sgabeblack@google.com      public:
13812371Sgabeblack@google.com          /** RTC Event initializes the RTC event by scheduling an event
13912371Sgabeblack@google.com           * RTC_RATE times pre second. */
14012371Sgabeblack@google.com          RTCEvent(Tsunami* t);
14111983Sgabeblack@google.com
1426143Snate@binkert.org          /**
1438233Snate@binkert.org           * Interrupth the processor and reschedule the event.
14412302Sgabeblack@google.com           * */
1456143Snate@binkert.org          virtual void process();
1466143Snate@binkert.org
14712302Sgabeblack@google.com          /**
1484762Snate@binkert.org           * Return a description of this event.
1496143Snate@binkert.org           * @return a description
1508233Snate@binkert.org           */
1518233Snate@binkert.org          virtual const char *description();
15212302Sgabeblack@google.com
15312302Sgabeblack@google.com          /**
1546143Snate@binkert.org           * Serialize this object to the given output stream.
15512362Sgabeblack@google.com           * @param os The stream to serialize to.
15612362Sgabeblack@google.com           */
15712362Sgabeblack@google.com          virtual void serialize(std::ostream &os);
15812362Sgabeblack@google.com
15912302Sgabeblack@google.com
16012302Sgabeblack@google.com          /**
16112302Sgabeblack@google.com           * Reconstruct the state of this object from a checkpoint.
16212302Sgabeblack@google.com           * @param cp The checkpoint use.
16312302Sgabeblack@google.com           * @param section The section name of this object
16412363Sgabeblack@google.com           */
16512363Sgabeblack@google.com          virtual void unserialize(Checkpoint *cp, const std::string &section);
16612363Sgabeblack@google.com     };
16712363Sgabeblack@google.com
16812302Sgabeblack@google.com    /** uip UpdateInProgess says that the rtc is updating, but we just fake it
16912363Sgabeblack@google.com     * by alternating it on every read of the bit since we are going to
17012363Sgabeblack@google.com     * override the loop_per_jiffy time that it is trying to use the UIP to
17112363Sgabeblack@google.com     * calculate.
17212363Sgabeblack@google.com     */
17312363Sgabeblack@google.com    uint8_t uip;
1748233Snate@binkert.org
1756143Snate@binkert.org    /** Mask of the PIC1 */
1766143Snate@binkert.org    uint8_t mask1;
1776143Snate@binkert.org
1786143Snate@binkert.org    /** Mask of the PIC2 */
1796143Snate@binkert.org    uint8_t mask2;
1806143Snate@binkert.org
1816143Snate@binkert.org    /** Mode of PIC1. Not used for anything */
1826143Snate@binkert.org    uint8_t mode1;
1836143Snate@binkert.org
1847065Snate@binkert.org    /** Mode of PIC2. Not used for anything */
1856143Snate@binkert.org    uint8_t mode2;
18612362Sgabeblack@google.com
18712362Sgabeblack@google.com    /** Raw PIC interrupt register before masking */
18812362Sgabeblack@google.com    uint8_t picr; //Raw PIC interrput register
18912362Sgabeblack@google.com
19012362Sgabeblack@google.com    /** Is the pic interrupting right now or not. */
19112362Sgabeblack@google.com    bool picInterrupting;
19212362Sgabeblack@google.com
19312362Sgabeblack@google.com    /** A pointer to the Tsunami device which be belong to */
19412362Sgabeblack@google.com    Tsunami *tsunami;
19512362Sgabeblack@google.com
19612362Sgabeblack@google.com    /**
19712362Sgabeblack@google.com     * This timer is initilized, but after I wrote the code
1988233Snate@binkert.org     * it doesn't seem to be used again, and best I can tell
1998233Snate@binkert.org     * it too is not connected to any interrupt port
2008233Snate@binkert.org     */
2018233Snate@binkert.org    ClockEvent timer0;
2028233Snate@binkert.org
2038233Snate@binkert.org    /**
2048233Snate@binkert.org     * This timer is used to control the speaker, which
2058233Snate@binkert.org     * we normally could care less about, however it is
2068233Snate@binkert.org     * also used to calculated the clockspeed and hense
2078233Snate@binkert.org     * bogomips which is kinda important to the scheduler
2088233Snate@binkert.org     * so we need to implemnt it although after boot I can't
2098233Snate@binkert.org     * imagine we would be playing with the PC speaker much
2108233Snate@binkert.org     */
2118233Snate@binkert.org    ClockEvent timer2;
2128233Snate@binkert.org
2138233Snate@binkert.org    /** This is the event used to interrupt the cpu like an RTC.  */
2148233Snate@binkert.org    RTCEvent rtc;
2158233Snate@binkert.org
2168233Snate@binkert.org    /** The interval is set via two writes to the PIT.
2178233Snate@binkert.org     * This variable contains a flag as to how many writes have happened, and
2188233Snate@binkert.org     * the time so far.
2196143Snate@binkert.org     */
2206143Snate@binkert.org    uint32_t timerData;
2216143Snate@binkert.org
2226143Snate@binkert.org
2236143Snate@binkert.org  public:
2246143Snate@binkert.org    /**
2259982Satgutier@umich.edu     * Return the freqency of the RTC
22613576Sciro.santilli@arm.com     * @return interrupt rate of the RTC
22713576Sciro.santilli@arm.com     */
22813576Sciro.santilli@arm.com    Tick  frequency() const { return RTC_RATE; }
22913576Sciro.santilli@arm.com
23013576Sciro.santilli@arm.com
23113576Sciro.santilli@arm.com    /**
23213576Sciro.santilli@arm.com     * Initialize all the data for devices supported by Tsunami I/O.
23313576Sciro.santilli@arm.com     * @param name name of this device.
23413576Sciro.santilli@arm.com     * @param t pointer back to the Tsunami object that we belong to.
23513576Sciro.santilli@arm.com     * @param init_time Time (as in seconds since 1970) to set RTC to.
23613576Sciro.santilli@arm.com     * @param a address we are mapped at.
23713576Sciro.santilli@arm.com     * @param mmu pointer to the memory controller that sends us events.
23813576Sciro.santilli@arm.com     */
23913576Sciro.santilli@arm.com    TsunamiIO(const std::string &name, Tsunami *t, time_t init_time,
24013576Sciro.santilli@arm.com              Addr a, MemoryController *mmu, HierParams *hier, Bus *bus);
24113576Sciro.santilli@arm.com
24213576Sciro.santilli@arm.com    /**
24313576Sciro.santilli@arm.com     * Create the tm struct from seconds since 1970
24413576Sciro.santilli@arm.com     */
24513576Sciro.santilli@arm.com    void set_time(time_t t);
24613576Sciro.santilli@arm.com
24713576Sciro.santilli@arm.com    /**
24813576Sciro.santilli@arm.com      * Process a read to one of the devices we are emulating.
24913576Sciro.santilli@arm.com      * @param req Contains the address to read from.
25013576Sciro.santilli@arm.com      * @param data A pointer to write the read data to.
25113576Sciro.santilli@arm.com      * @return The fault condition of the access.
25213576Sciro.santilli@arm.com      */
25313576Sciro.santilli@arm.com    virtual Fault read(MemReqPtr &req, uint8_t *data);
25413576Sciro.santilli@arm.com
25513576Sciro.santilli@arm.com    /**
25613576Sciro.santilli@arm.com      * Process a write to one of the devices we emulate.
25713576Sciro.santilli@arm.com      * @param req Contains the address to write to.
25813576Sciro.santilli@arm.com      * @param data The data to write.
25913576Sciro.santilli@arm.com      * @return The fault condition of the access.
26013576Sciro.santilli@arm.com      */
26113576Sciro.santilli@arm.com    virtual Fault write(MemReqPtr &req, const uint8_t *data);
26213576Sciro.santilli@arm.com
26313576Sciro.santilli@arm.com    /**
26413576Sciro.santilli@arm.com     * Post an PIC interrupt to the CPU via the CChip
26513576Sciro.santilli@arm.com     * @param bitvector interrupt to post.
26613576Sciro.santilli@arm.com     */
26713576Sciro.santilli@arm.com    void postPIC(uint8_t bitvector);
26813576Sciro.santilli@arm.com
26913576Sciro.santilli@arm.com    /**
27013576Sciro.santilli@arm.com     * Clear a posted interrupt
27113576Sciro.santilli@arm.com     * @param bitvector interrupt to clear
27213576Sciro.santilli@arm.com     */
27313576Sciro.santilli@arm.com    void clearPIC(uint8_t bitvector);
27413576Sciro.santilli@arm.com
27513576Sciro.santilli@arm.com    /**
27613576Sciro.santilli@arm.com     * Serialize this object to the given output stream.
27713576Sciro.santilli@arm.com     * @param os The stream to serialize to.
27813576Sciro.santilli@arm.com     */
27913576Sciro.santilli@arm.com    virtual void serialize(std::ostream &os);
28013576Sciro.santilli@arm.com
28113576Sciro.santilli@arm.com
28213576Sciro.santilli@arm.com    /**
28313576Sciro.santilli@arm.com     * Reconstruct the state of this object from a checkpoint.
28413576Sciro.santilli@arm.com     * @param cp The checkpoint use.
28513576Sciro.santilli@arm.com     * @param section The section name of this object
28613576Sciro.santilli@arm.com     */
28713576Sciro.santilli@arm.com    virtual void unserialize(Checkpoint *cp, const std::string &section);
28813576Sciro.santilli@arm.com
28913576Sciro.santilli@arm.com
29013576Sciro.santilli@arm.com    Tick cacheAccess(MemReqPtr &req);
29113576Sciro.santilli@arm.com};
29213576Sciro.santilli@arm.com
29313576Sciro.santilli@arm.com#endif // __TSUNAMI_IO_HH__
29413576Sciro.santilli@arm.com