tsunami_io.hh revision 909
1/* 2 * Copyright (c) 2004 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* @file 30 * Tsunami Fake I/O Space mapping including RTC/timer interrupts 31 */ 32 33#ifndef __TSUNAMI_DMA_HH__ 34#define __TSUNAMI_DMA_HH__ 35 36#include "dev/io_device.hh" 37#include "base/range.hh" 38#include "dev/tsunami.hh" 39 40/** How often the RTC interrupts */ 41static const int RTC_RATE = 1024; 42 43/* 44 * Tsunami I/O device is a catch all for all the south bridge stuff we care 45 * to implement. 46 */ 47class TsunamiIO : public PioDevice 48{ 49 private: 50 /** The base address of this device */ 51 Addr addr; 52 53 /** The size of mappad from the above address */ 54 static const Addr size = 0xff; 55 56 struct tm tm; 57 58 /** In Tsunami RTC only has two i/o ports one for data and one for address, 59 * so you write the address and then read/write the data. This store the 60 * address you are going to be reading from on a read. 61 */ 62 uint8_t RTCAddress; 63 64 protected: 65 66 /** 67 * The ClockEvent is handles the PIT interrupts 68 */ 69 class ClockEvent : public Event 70 { 71 protected: 72 /** how often the PIT fires */ 73 Tick interval; 74 /** The mode of the PIT */ 75 uint8_t mode; 76 /** The status of the PIT */ 77 uint8_t status; 78 79 public: 80 /** 81 * Just set the mode to 0 82 */ 83 ClockEvent(); 84 85 /** 86 * processs the timer event 87 */ 88 virtual void process(); 89 90 /** 91 * Returns a description of this event 92 * @return the description 93 */ 94 virtual const char *description(); 95 96 /** 97 * Schedule a timer interrupt to occur sometime in the future. 98 */ 99 void Program(int count); 100 101 /** 102 * Write the mode bits of the PIT. 103 * @param mode the new mode 104 */ 105 void ChangeMode(uint8_t mode); 106 107 /** 108 * The current PIT status. 109 * @return the status of the PIT 110 */ 111 uint8_t Status(); 112 113 }; 114 115 /** 116 * Process RTC timer events and generate interrupts appropriately. 117 */ 118 class RTCEvent : public Event 119 { 120 protected: 121 /** A pointer back to tsunami to create interrupt the processor. */ 122 Tsunami* tsunami; 123 public: 124 /** RTC Event initializes the RTC event by scheduling an event 125 * RTC_RATE times pre second. */ 126 RTCEvent(Tsunami* t); 127 128 /** 129 * Interrupth the processor and reschedule the event. 130 * */ 131 virtual void process(); 132 133 /** 134 * Return a description of this event. 135 * @return a description 136 */ 137 virtual const char *description(); 138 139 }; 140 141 /** uip UpdateInProgess says that the rtc is updating, but we just fake it 142 * by alternating it on every read of the bit since we are going to 143 * override the loop_per_jiffy time that it is trying to use the UIP to 144 * calculate. 145 */ 146 uint8_t uip; 147 148 /** Mask of the PIC1 */ 149 uint8_t mask1; 150 151 /** Mask of the PIC2 */ 152 uint8_t mask2; 153 154 /** Mode of PIC1. Not used for anything */ 155 uint8_t mode1; 156 157 /** Mode of PIC2. Not used for anything */ 158 uint8_t mode2; 159 160 /** Raw PIC interrupt register before masking */ 161 uint8_t picr; //Raw PIC interrput register 162 163 /** Is the pic interrupting right now or not. */ 164 bool picInterrupting; 165 166 /** A pointer to the Tsunami device which be belong to */ 167 Tsunami *tsunami; 168 169 /** 170 * This timer is initilized, but after I wrote the code 171 * it doesn't seem to be used again, and best I can tell 172 * it too is not connected to any interrupt port 173 */ 174 ClockEvent timer0; 175 176 /** 177 * This timer is used to control the speaker, which 178 * we normally could care less about, however it is 179 * also used to calculated the clockspeed and hense 180 * bogomips which is kinda important to the scheduler 181 * so we need to implemnt it although after boot I can't 182 * imagine we would be playing with the PC speaker much 183 */ 184 ClockEvent timer2; 185 186 /** This is the event used to interrupt the cpu like an RTC. */ 187 RTCEvent rtc; 188 189 /** The interval is set via two writes to the PIT. 190 * This variable contains a flag as to how many writes have happened, and 191 * the time so far. 192 */ 193 uint32_t timerData; 194 195 196 public: 197 /** 198 * Return the freqency of the RTC 199 * @return interrupt rate of the RTC 200 */ 201 Tick frequency() const { return RTC_RATE; } 202 203 204 /** 205 * Initialize all the data for devices supported by Tsunami I/O. 206 * @param name name of this device. 207 * @param t pointer back to the Tsunami object that we belong to. 208 * @param init_time Time (as in seconds since 1970) to set RTC to. 209 * @param a address we are mapped at. 210 * @param mmu pointer to the memory controller that sends us events. 211 */ 212 TsunamiIO(const std::string &name, Tsunami *t, time_t init_time, 213 Addr a, MemoryController *mmu, HierParams *hier, Bus *bus); 214 215 /** 216 * Create the tm struct from seconds since 1970 217 */ 218 void set_time(time_t t); 219 220 /** 221 * Process a read to one of the devices we are emulating. 222 * @param req Contains the address to read from. 223 * @param data A pointer to write the read data to. 224 * @return The fault condition of the access. 225 */ 226 virtual Fault read(MemReqPtr &req, uint8_t *data); 227 228 /** 229 * Process a write to one of the devices we emulate. 230 * @param req Contains the address to write to. 231 * @param data The data to write. 232 * @return The fault condition of the access. 233 */ 234 virtual Fault write(MemReqPtr &req, const uint8_t *data); 235 236 /** 237 * Post an PIC interrupt to the CPU via the CChip 238 * @param bitvector interrupt to post. 239 */ 240 void postPIC(uint8_t bitvector); 241 242 /** 243 * Clear a posted interrupt 244 * @param bitvector interrupt to clear 245 */ 246 void clearPIC(uint8_t bitvector); 247 248 /** 249 * Serialize this object to the given output stream. 250 * @param os The stream to serialize to. 251 */ 252 virtual void serialize(std::ostream &os); 253 254 255 /** 256 * Reconstruct the state of this object from a checkpoint. 257 * @param cp The checkpoint use. 258 * @param section The section name of this object 259 */ 260 virtual void unserialize(Checkpoint *cp, const std::string §ion); 261 262 263 Tick cacheAccess(MemReqPtr &req); 264}; 265 266#endif // __TSUNAMI_IO_HH__ 267