tsunami_io.hh revision 803
1/*
2 * Copyright (c) 2003 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/* @file
30 * Tsunami Fake I/O Space mapping including RTC/timer interrupts
31 */
32
33#ifndef __TSUNAMI_DMA_HH__
34#define __TSUNAMI_DMA_HH__
35
36#define RTC_RATE 1024
37
38#include "mem/functional_mem/mmap_device.hh"
39#include "dev/tsunami.hh"
40
41/*
42 * Tsunami I/O device
43 */
44class TsunamiIO : public MmapDevice
45{
46
47  private:
48    struct tm tm;
49
50    // In Tsunami RTC only has two i/o ports
51    // one  for data and one for address, so you
52    // write the address and then read/write the data
53    uint8_t RTCAddress;
54
55  protected:
56
57    class ClockEvent : public Event
58    {
59      protected:
60        Tick interval;
61        uint8_t mode;
62        uint8_t status;
63
64      public:
65        ClockEvent();
66
67        virtual void process();
68        virtual const char *description();
69        void Program(int count);
70        void ChangeMode(uint8_t mode);
71        uint8_t Status();
72
73    };
74
75    class RTCEvent : public Event
76    {
77      protected:
78        Tsunami* tsunami;
79      public:
80        RTCEvent(Tsunami* t);
81
82        virtual void process();
83        virtual const char *description();
84    };
85
86    uint8_t uip;
87
88    uint8_t mask1;
89    uint8_t mask2;
90    uint8_t mode1;
91    uint8_t mode2;
92
93    uint8_t picr; //Raw PIC interrput register, before masking
94    bool picInterrupting;
95
96    Tsunami *tsunami;
97
98    /*
99     * This timer is initilized, but after I wrote the code
100     * it doesn't seem to be used again, and best I can tell
101     * it too is not connected to any interrupt port
102     */
103    ClockEvent timer0;
104
105    /*
106     * This timer is used to control the speaker, which
107     * we normally could care less about, however it is
108     * also used to calculated the clockspeed and hense
109     * bogomips which is kinda important to the scheduler
110     * so we need to implemnt it although after boot I can't
111     * imagine we would be playing with the PC speaker much
112     */
113    ClockEvent timer2;
114
115    RTCEvent rtc;
116
117    uint32_t timerData;
118
119
120  public:
121    uint32_t  frequency() const { return RTC_RATE; }
122
123    TsunamiIO(const std::string &name, Tsunami *t, time_t init_time,
124              Addr addr, Addr mask,  MemoryController *mmu);
125
126    void set_time(time_t t);
127
128    virtual Fault read(MemReqPtr &req, uint8_t *data);
129    virtual Fault write(MemReqPtr &req, const uint8_t *data);
130
131    void postPIC(uint8_t bitvector);
132    void clearPIC(uint8_t bitvector);
133
134    virtual void serialize(std::ostream &os);
135    virtual void unserialize(Checkpoint *cp, const std::string &section);
136};
137
138#endif // __TSUNAMI_IO_HH__
139