tsunami_io.hh revision 5392
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ali Saidi 29 * Andrew Schultz 30 * Miguel Serrano 31 */ 32 33/** @file 34 * Tsunami I/O Space mapping including RTC/timer interrupts 35 */ 36 37#ifndef __DEV_TSUNAMI_IO_HH__ 38#define __DEV_TSUNAMI_IO_HH__ 39 40#include "base/range.hh" 41#include "dev/alpha/tsunami.hh" 42#include "dev/mc146818.hh" 43#include "dev/io_device.hh" 44#include "params/TsunamiIO.hh" 45#include "sim/eventq.hh" 46 47/** 48 * Tsunami I/O device is a catch all for all the south bridge stuff we care 49 * to implement. 50 */ 51class TsunamiIO : public BasicPioDevice 52{ 53 private: 54 struct tm tm; 55 56 protected: 57 58 class TsunamiRTC : public MC146818 59 { 60 public: 61 Tsunami * tsunami; 62 TsunamiRTC(const std::string &n, const TsunamiIOParams *p); 63 64 protected: 65 void handleEvent() 66 { 67 //Actually interrupt the processor here 68 tsunami->cchip->postRTC(); 69 } 70 }; 71 72 /** Programmable Interval Timer (Intel 8254) */ 73 class PITimer 74 { 75 /** Counter element for PIT */ 76 class Counter 77 { 78 /** Event for counter interrupt */ 79 class CounterEvent : public Event 80 { 81 private: 82 /** Pointer back to Counter */ 83 Counter* counter; 84 Tick interval; 85 86 public: 87 CounterEvent(Counter*); 88 89 /** Event process */ 90 virtual void process(); 91 92 /** Event description */ 93 virtual const char *description() const; 94 95 friend class Counter; 96 }; 97 98 private: 99 std::string _name; 100 const std::string &name() const { return _name; } 101 102 CounterEvent event; 103 104 /** Current count value */ 105 uint16_t count; 106 107 /** Latched count */ 108 uint16_t latched_count; 109 110 /** Interrupt period */ 111 uint16_t period; 112 113 /** Current mode of operation */ 114 uint8_t mode; 115 116 /** Output goes high when the counter reaches zero */ 117 bool output_high; 118 119 /** State of the count latch */ 120 bool latch_on; 121 122 /** Set of values for read_byte and write_byte */ 123 enum {LSB, MSB}; 124 125 /** Determine which byte of a 16-bit count value to read/write */ 126 uint8_t read_byte, write_byte; 127 128 public: 129 Counter(const std::string &name); 130 131 /** Latch the current count (if one is not already latched) */ 132 void latchCount(); 133 134 /** Set the read/write mode */ 135 void setRW(int rw_val); 136 137 /** Set operational mode */ 138 void setMode(int mode_val); 139 140 /** Set count encoding */ 141 void setBCD(int bcd_val); 142 143 /** Read a count byte */ 144 uint8_t read(); 145 146 /** Write a count byte */ 147 void write(const uint8_t data); 148 149 /** Is the output high? */ 150 bool outputHigh(); 151 152 /** 153 * Serialize this object to the given output stream. 154 * @param base The base name of the counter object. 155 * @param os The stream to serialize to. 156 */ 157 void serialize(const std::string &base, std::ostream &os); 158 159 /** 160 * Reconstruct the state of this object from a checkpoint. 161 * @param base The base name of the counter object. 162 * @param cp The checkpoint use. 163 * @param section The section name of this object 164 */ 165 void unserialize(const std::string &base, Checkpoint *cp, 166 const std::string §ion); 167 }; 168 169 private: 170 std::string _name; 171 const std::string &name() const { return _name; } 172 173 /** PIT has three seperate counters */ 174 Counter *counter[3]; 175 176 public: 177 /** Public way to access individual counters (avoid array accesses) */ 178 Counter counter0; 179 Counter counter1; 180 Counter counter2; 181 182 PITimer(const std::string &name); 183 184 /** Write control word */ 185 void writeControl(const uint8_t data); 186 187 /** 188 * Serialize this object to the given output stream. 189 * @param base The base name of the counter object. 190 * @param os The stream to serialize to. 191 */ 192 void serialize(const std::string &base, std::ostream &os); 193 194 /** 195 * Reconstruct the state of this object from a checkpoint. 196 * @param base The base name of the counter object. 197 * @param cp The checkpoint use. 198 * @param section The section name of this object 199 */ 200 void unserialize(const std::string &base, Checkpoint *cp, 201 const std::string §ion); 202 }; 203 204 /** Mask of the PIC1 */ 205 uint8_t mask1; 206 207 /** Mask of the PIC2 */ 208 uint8_t mask2; 209 210 /** Mode of PIC1. Not used for anything */ 211 uint8_t mode1; 212 213 /** Mode of PIC2. Not used for anything */ 214 uint8_t mode2; 215 216 /** Raw PIC interrupt register before masking */ 217 uint8_t picr; //Raw PIC interrput register 218 219 /** Is the pic interrupting right now or not. */ 220 bool picInterrupting; 221 222 /** A pointer to the Tsunami device which be belong to */ 223 Tsunami *tsunami; 224 225 /** Intel 8253 Periodic Interval Timer */ 226 PITimer pitimer; 227 228 TsunamiRTC rtc; 229 230 uint8_t rtcAddr; 231 232 /** The interval is set via two writes to the PIT. 233 * This variable contains a flag as to how many writes have happened, and 234 * the time so far. 235 */ 236 uint16_t timerData; 237 238 public: 239 /** 240 * Return the freqency of the RTC 241 * @return interrupt rate of the RTC 242 */ 243 Tick frequency() const; 244 245 public: 246 typedef TsunamiIOParams Params; 247 /** 248 * Initialize all the data for devices supported by Tsunami I/O. 249 * @param p pointer to Params struct 250 */ 251 TsunamiIO(const Params *p); 252 253 const Params * 254 params() const 255 { 256 return dynamic_cast<const Params *>(_params); 257 } 258 259 virtual Tick read(PacketPtr pkt); 260 virtual Tick write(PacketPtr pkt); 261 262 /** 263 * Post an PIC interrupt to the CPU via the CChip 264 * @param bitvector interrupt to post. 265 */ 266 void postPIC(uint8_t bitvector); 267 268 /** 269 * Clear a posted interrupt 270 * @param bitvector interrupt to clear 271 */ 272 void clearPIC(uint8_t bitvector); 273 274 /** 275 * Serialize this object to the given output stream. 276 * @param os The stream to serialize to. 277 */ 278 virtual void serialize(std::ostream &os); 279 280 /** 281 * Reconstruct the state of this object from a checkpoint. 282 * @param cp The checkpoint use. 283 * @param section The section name of this object 284 */ 285 virtual void unserialize(Checkpoint *cp, const std::string §ion); 286 287}; 288 289#endif // __DEV_TSUNAMI_IO_HH__ 290