tsunami_io.hh revision 5336:c7e21f4e5a2e 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 *          Andrew Schultz
30 *          Miguel Serrano
31 */
32
33/** @file
34 * Tsunami I/O Space mapping including RTC/timer interrupts
35 */
36
37#ifndef __DEV_TSUNAMI_IO_HH__
38#define __DEV_TSUNAMI_IO_HH__
39
40#include "base/range.hh"
41#include "dev/alpha/tsunami.hh"
42#include "dev/io_device.hh"
43#include "params/TsunamiIO.hh"
44#include "sim/eventq.hh"
45
46/**
47 * Tsunami I/O device is a catch all for all the south bridge stuff we care
48 * to implement.
49 */
50class TsunamiIO : public BasicPioDevice
51{
52  private:
53    struct tm tm;
54
55  protected:
56    /** Real-Time Clock (MC146818) */
57    class RTC
58    {
59      private:
60        /** Event for RTC periodic interrupt */
61        struct RTCEvent : public Event
62        {
63            /** A pointer back to tsunami to create interrupt the processor. */
64            Tsunami* tsunami;
65            Tick interval;
66
67            RTCEvent(Tsunami* t, Tick i);
68
69            /** Schedule the RTC periodic interrupt */
70            void scheduleIntr();
71
72            /** Event process to occur at interrupt*/
73            virtual void process();
74
75            /** Event description */
76            virtual const char *description() const;
77        };
78
79      private:
80        std::string _name;
81        const std::string &name() const { return _name; }
82
83        /** RTC periodic interrupt event */
84        RTCEvent event;
85
86        /** Current RTC register address/index */
87        int addr;
88
89        /** Data for real-time clock function */
90        union {
91            uint8_t clock_data[10];
92
93            struct {
94                uint8_t sec;
95                uint8_t sec_alrm;
96                uint8_t min;
97                uint8_t min_alrm;
98                uint8_t hour;
99                uint8_t hour_alrm;
100                uint8_t wday;
101                uint8_t mday;
102                uint8_t mon;
103                uint8_t year;
104            };
105        };
106
107        /** RTC status register A */
108        uint8_t stat_regA;
109
110        /** RTC status register B */
111        uint8_t stat_regB;
112
113      public:
114        RTC(const std::string &name, Tsunami* tsunami,
115            const TsunamiIOParams *params);
116
117        /** RTC address port: write address of RTC RAM data to access */
118        void writeAddr(const uint8_t data);
119
120        /** RTC write data */
121        void writeData(const uint8_t data);
122
123        /** RTC read data */
124        uint8_t readData();
125
126        /**
127          * Serialize this object to the given output stream.
128          * @param base The base name of the counter object.
129          * @param os The stream to serialize to.
130          */
131        void serialize(const std::string &base, std::ostream &os);
132
133        /**
134         * Reconstruct the state of this object from a checkpoint.
135          * @param base The base name of the counter object.
136         * @param cp The checkpoint use.
137         * @param section The section name of this object
138         */
139        void unserialize(const std::string &base, Checkpoint *cp,
140                         const std::string &section);
141    };
142
143    /** Programmable Interval Timer (Intel 8254) */
144    class PITimer
145    {
146        /** Counter element for PIT */
147        class Counter
148        {
149            /** Event for counter interrupt */
150            class CounterEvent : public Event
151            {
152              private:
153                /** Pointer back to Counter */
154                Counter* counter;
155                Tick interval;
156
157              public:
158                CounterEvent(Counter*);
159
160                /** Event process */
161                virtual void process();
162
163                /** Event description */
164                virtual const char *description() const;
165
166                friend class Counter;
167            };
168
169          private:
170            std::string _name;
171            const std::string &name() const { return _name; }
172
173            CounterEvent event;
174
175            /** Current count value */
176            uint16_t count;
177
178            /** Latched count */
179            uint16_t latched_count;
180
181            /** Interrupt period */
182            uint16_t period;
183
184            /** Current mode of operation */
185            uint8_t mode;
186
187            /** Output goes high when the counter reaches zero */
188            bool output_high;
189
190            /** State of the count latch */
191            bool latch_on;
192
193            /** Set of values for read_byte and write_byte */
194            enum {LSB, MSB};
195
196            /** Determine which byte of a 16-bit count value to read/write */
197            uint8_t read_byte, write_byte;
198
199          public:
200            Counter(const std::string &name);
201
202            /** Latch the current count (if one is not already latched) */
203            void latchCount();
204
205            /** Set the read/write mode */
206            void setRW(int rw_val);
207
208            /** Set operational mode */
209            void setMode(int mode_val);
210
211            /** Set count encoding */
212            void setBCD(int bcd_val);
213
214            /** Read a count byte */
215            uint8_t read();
216
217            /** Write a count byte */
218            void write(const uint8_t data);
219
220            /** Is the output high? */
221            bool outputHigh();
222
223            /**
224             * Serialize this object to the given output stream.
225             * @param base The base name of the counter object.
226             * @param os   The stream to serialize to.
227             */
228            void serialize(const std::string &base, std::ostream &os);
229
230            /**
231             * Reconstruct the state of this object from a checkpoint.
232             * @param base The base name of the counter object.
233             * @param cp The checkpoint use.
234             * @param section The section name of this object
235             */
236            void unserialize(const std::string &base, Checkpoint *cp,
237                             const std::string &section);
238        };
239
240      private:
241        std::string _name;
242        const std::string &name() const { return _name; }
243
244        /** PIT has three seperate counters */
245        Counter *counter[3];
246
247      public:
248        /** Public way to access individual counters (avoid array accesses) */
249        Counter counter0;
250        Counter counter1;
251        Counter counter2;
252
253        PITimer(const std::string &name);
254
255        /** Write control word */
256        void writeControl(const uint8_t data);
257
258        /**
259         * Serialize this object to the given output stream.
260         * @param base The base name of the counter object.
261         * @param os The stream to serialize to.
262         */
263        void serialize(const std::string &base, std::ostream &os);
264
265        /**
266         * Reconstruct the state of this object from a checkpoint.
267         * @param base The base name of the counter object.
268         * @param cp The checkpoint use.
269         * @param section The section name of this object
270         */
271        void unserialize(const std::string &base, Checkpoint *cp,
272                         const std::string &section);
273    };
274
275    /** Mask of the PIC1 */
276    uint8_t mask1;
277
278    /** Mask of the PIC2 */
279    uint8_t mask2;
280
281    /** Mode of PIC1. Not used for anything */
282    uint8_t mode1;
283
284    /** Mode of PIC2. Not used for anything */
285    uint8_t mode2;
286
287    /** Raw PIC interrupt register before masking */
288    uint8_t picr; //Raw PIC interrput register
289
290    /** Is the pic interrupting right now or not. */
291    bool picInterrupting;
292
293    /** A pointer to the Tsunami device which be belong to */
294    Tsunami *tsunami;
295
296    /** Intel 8253 Periodic Interval Timer */
297    PITimer pitimer;
298
299    RTC rtc;
300
301    /** The interval is set via two writes to the PIT.
302     * This variable contains a flag as to how many writes have happened, and
303     * the time so far.
304     */
305    uint16_t timerData;
306
307  public:
308    /**
309     * Return the freqency of the RTC
310     * @return interrupt rate of the RTC
311     */
312    Tick frequency() const;
313
314  public:
315    typedef TsunamiIOParams Params;
316    /**
317     * Initialize all the data for devices supported by Tsunami I/O.
318     * @param p pointer to Params struct
319     */
320    TsunamiIO(const Params *p);
321
322    const Params *
323    params() const
324    {
325        return dynamic_cast<const Params *>(_params);
326    }
327
328    virtual Tick read(PacketPtr pkt);
329    virtual Tick write(PacketPtr pkt);
330
331    /**
332     * Post an PIC interrupt to the CPU via the CChip
333     * @param bitvector interrupt to post.
334     */
335    void postPIC(uint8_t bitvector);
336
337    /**
338     * Clear a posted interrupt
339     * @param bitvector interrupt to clear
340     */
341    void clearPIC(uint8_t bitvector);
342
343    /**
344     * Serialize this object to the given output stream.
345     * @param os The stream to serialize to.
346     */
347    virtual void serialize(std::ostream &os);
348
349    /**
350     * Reconstruct the state of this object from a checkpoint.
351     * @param cp The checkpoint use.
352     * @param section The section name of this object
353     */
354    virtual void unserialize(Checkpoint *cp, const std::string &section);
355
356};
357
358#endif // __DEV_TSUNAMI_IO_HH__
359