tsunami_io.hh revision 3540:87e83423cb36 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 *          Andrew Schultz
30 *          Miguel Serrano
31 */
32
33/** @file
34 * Tsunami I/O Space mapping including RTC/timer interrupts
35 */
36
37#ifndef __DEV_TSUNAMI_IO_HH__
38#define __DEV_TSUNAMI_IO_HH__
39
40#include "dev/io_device.hh"
41#include "base/range.hh"
42#include "dev/alpha/tsunami.hh"
43#include "sim/eventq.hh"
44
45/**
46 * Tsunami I/O device is a catch all for all the south bridge stuff we care
47 * to implement.
48 */
49class TsunamiIO : public BasicPioDevice
50{
51  private:
52    struct tm tm;
53
54  protected:
55    /** Real-Time Clock (MC146818) */
56    class RTC
57    {
58      private:
59        /** Event for RTC periodic interrupt */
60        struct RTCEvent : public Event
61        {
62            /** A pointer back to tsunami to create interrupt the processor. */
63            Tsunami* tsunami;
64            Tick interval;
65
66            RTCEvent(Tsunami* t, Tick i);
67
68            /** Schedule the RTC periodic interrupt */
69            void scheduleIntr();
70
71            /** Event process to occur at interrupt*/
72            virtual void process();
73
74            /** Event description */
75            virtual const char *description();
76        };
77
78      private:
79        std::string _name;
80        const std::string &name() const { return _name; }
81
82        /** RTC periodic interrupt event */
83        RTCEvent event;
84
85        /** Current RTC register address/index */
86        int addr;
87
88        /** Data for real-time clock function */
89        union {
90            uint8_t clock_data[10];
91
92            struct {
93                uint8_t sec;
94                uint8_t sec_alrm;
95                uint8_t min;
96                uint8_t min_alrm;
97                uint8_t hour;
98                uint8_t hour_alrm;
99                uint8_t wday;
100                uint8_t mday;
101                uint8_t mon;
102                uint8_t year;
103            };
104        };
105
106        /** RTC status register A */
107        uint8_t stat_regA;
108
109        /** RTC status register B */
110        uint8_t stat_regB;
111
112      public:
113        RTC(const std::string &name, Tsunami* t, Tick i);
114
115        /** Set the initial RTC time/date */
116        void set_time(time_t t);
117
118        /** RTC address port: write address of RTC RAM data to access */
119        void writeAddr(const uint8_t data);
120
121        /** RTC write data */
122        void writeData(const uint8_t data);
123
124        /** RTC read data */
125        uint8_t readData();
126
127        /**
128          * Serialize this object to the given output stream.
129          * @param base The base name of the counter object.
130          * @param os The stream to serialize to.
131          */
132        void serialize(const std::string &base, std::ostream &os);
133
134        /**
135         * Reconstruct the state of this object from a checkpoint.
136          * @param base The base name of the counter object.
137         * @param cp The checkpoint use.
138         * @param section The section name of this object
139         */
140        void unserialize(const std::string &base, Checkpoint *cp,
141                         const std::string &section);
142    };
143
144    /** Programmable Interval Timer (Intel 8254) */
145    class PITimer
146    {
147        /** Counter element for PIT */
148        class Counter
149        {
150            /** Event for counter interrupt */
151            class CounterEvent : public Event
152            {
153              private:
154                /** Pointer back to Counter */
155                Counter* counter;
156                Tick interval;
157
158              public:
159                CounterEvent(Counter*);
160
161                /** Event process */
162                virtual void process();
163
164                /** Event description */
165                virtual const char *description();
166
167                friend class Counter;
168            };
169
170          private:
171            std::string _name;
172            const std::string &name() const { return _name; }
173
174            CounterEvent event;
175
176            /** Current count value */
177            uint16_t count;
178
179            /** Latched count */
180            uint16_t latched_count;
181
182            /** Interrupt period */
183            uint16_t period;
184
185            /** Current mode of operation */
186            uint8_t mode;
187
188            /** Output goes high when the counter reaches zero */
189            bool output_high;
190
191            /** State of the count latch */
192            bool latch_on;
193
194            /** Set of values for read_byte and write_byte */
195            enum {LSB, MSB};
196
197            /** Determine which byte of a 16-bit count value to read/write */
198            uint8_t read_byte, write_byte;
199
200          public:
201            Counter(const std::string &name);
202
203            /** Latch the current count (if one is not already latched) */
204            void latchCount();
205
206            /** Set the read/write mode */
207            void setRW(int rw_val);
208
209            /** Set operational mode */
210            void setMode(int mode_val);
211
212            /** Set count encoding */
213            void setBCD(int bcd_val);
214
215            /** Read a count byte */
216            uint8_t read();
217
218            /** Write a count byte */
219            void write(const uint8_t data);
220
221            /** Is the output high? */
222            bool outputHigh();
223
224            /**
225             * Serialize this object to the given output stream.
226             * @param base The base name of the counter object.
227             * @param os   The stream to serialize to.
228             */
229            void serialize(const std::string &base, std::ostream &os);
230
231            /**
232             * Reconstruct the state of this object from a checkpoint.
233             * @param base The base name of the counter object.
234             * @param cp The checkpoint use.
235             * @param section The section name of this object
236             */
237            void unserialize(const std::string &base, Checkpoint *cp,
238                             const std::string &section);
239        };
240
241      private:
242        std::string _name;
243        const std::string &name() const { return _name; }
244
245        /** PIT has three seperate counters */
246        Counter *counter[3];
247
248      public:
249        /** Public way to access individual counters (avoid array accesses) */
250        Counter counter0;
251        Counter counter1;
252        Counter counter2;
253
254        PITimer(const std::string &name);
255
256        /** Write control word */
257        void writeControl(const uint8_t data);
258
259        /**
260         * Serialize this object to the given output stream.
261         * @param base The base name of the counter object.
262         * @param os The stream to serialize to.
263         */
264        void serialize(const std::string &base, std::ostream &os);
265
266        /**
267         * Reconstruct the state of this object from a checkpoint.
268         * @param base The base name of the counter object.
269         * @param cp The checkpoint use.
270         * @param section The section name of this object
271         */
272        void unserialize(const std::string &base, Checkpoint *cp,
273                         const std::string &section);
274    };
275
276    /** Mask of the PIC1 */
277    uint8_t mask1;
278
279    /** Mask of the PIC2 */
280    uint8_t mask2;
281
282    /** Mode of PIC1. Not used for anything */
283    uint8_t mode1;
284
285    /** Mode of PIC2. Not used for anything */
286    uint8_t mode2;
287
288    /** Raw PIC interrupt register before masking */
289    uint8_t picr; //Raw PIC interrput register
290
291    /** Is the pic interrupting right now or not. */
292    bool picInterrupting;
293
294    /** A pointer to the Tsunami device which be belong to */
295    Tsunami *tsunami;
296
297    /** Intel 8253 Periodic Interval Timer */
298    PITimer pitimer;
299
300    RTC rtc;
301
302    /** The interval is set via two writes to the PIT.
303     * This variable contains a flag as to how many writes have happened, and
304     * the time so far.
305     */
306    uint16_t timerData;
307
308  public:
309    /**
310     * Return the freqency of the RTC
311     * @return interrupt rate of the RTC
312     */
313    Tick frequency() const;
314
315    struct Params : public BasicPioDevice::Params
316    {
317        Tick frequency;
318        Tsunami *tsunami;
319        time_t init_time;
320    };
321  protected:
322    const Params *params() const { return (const Params*)_params; }
323
324  public:
325    /**
326     * Initialize all the data for devices supported by Tsunami I/O.
327     * @param p pointer to Params struct
328     */
329    TsunamiIO(Params *p);
330
331    virtual Tick read(PacketPtr pkt);
332    virtual Tick write(PacketPtr pkt);
333
334    /**
335     * Post an PIC interrupt to the CPU via the CChip
336     * @param bitvector interrupt to post.
337     */
338    void postPIC(uint8_t bitvector);
339
340    /**
341     * Clear a posted interrupt
342     * @param bitvector interrupt to clear
343     */
344    void clearPIC(uint8_t bitvector);
345
346    /**
347     * Serialize this object to the given output stream.
348     * @param os The stream to serialize to.
349     */
350    virtual void serialize(std::ostream &os);
351
352    /**
353     * Reconstruct the state of this object from a checkpoint.
354     * @param cp The checkpoint use.
355     * @param section The section name of this object
356     */
357    virtual void unserialize(Checkpoint *cp, const std::string &section);
358
359};
360
361#endif // __DEV_TSUNAMI_IO_HH__
362