tsunami_io.hh revision 2542
12810SN/A/* 211375Sandreas.hansson@arm.com * Copyright (c) 2004-2005 The Regents of The University of Michigan 38856Sandreas.hansson@arm.com * All rights reserved. 48856Sandreas.hansson@arm.com * 58856Sandreas.hansson@arm.com * Redistribution and use in source and binary forms, with or without 68856Sandreas.hansson@arm.com * modification, are permitted provided that the following conditions are 78856Sandreas.hansson@arm.com * met: redistributions of source code must retain the above copyright 88856Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer; 98856Sandreas.hansson@arm.com * redistributions in binary form must reproduce the above copyright 108856Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer in the 118856Sandreas.hansson@arm.com * documentation and/or other materials provided with the distribution; 128856Sandreas.hansson@arm.com * neither the name of the copyright holders nor the names of its 138856Sandreas.hansson@arm.com * contributors may be used to endorse or promote products derived from 142810SN/A * this software without specific prior written permission. 152810SN/A * 162810SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172810SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182810SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192810SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202810SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212810SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222810SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232810SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242810SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252810SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262810SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272810SN/A */ 282810SN/A 292810SN/A/** @file 302810SN/A * Tsunami I/O Space mapping including RTC/timer interrupts 312810SN/A */ 322810SN/A 332810SN/A#ifndef __DEV_TSUNAMI_IO_HH__ 342810SN/A#define __DEV_TSUNAMI_IO_HH__ 352810SN/A 362810SN/A#include "dev/io_device.hh" 372810SN/A#include "base/range.hh" 382810SN/A#include "dev/tsunami.hh" 392810SN/A#include "sim/eventq.hh" 402810SN/A 414458SN/A/** 424458SN/A * Tsunami I/O device is a catch all for all the south bridge stuff we care 432810SN/A * to implement. 442810SN/A */ 452810SN/Aclass TsunamiIO : public BasicPioDevice 462810SN/A{ 472810SN/A private: 482810SN/A struct tm tm; 492810SN/A 5011051Sandreas.hansson@arm.com protected: 5111051Sandreas.hansson@arm.com /** Real-Time Clock (MC146818) */ 522810SN/A class RTC 537676Snate@binkert.org { 547676Snate@binkert.org private: 557676Snate@binkert.org /** Event for RTC periodic interrupt */ 562810SN/A struct RTCEvent : public Event 572810SN/A { 582825SN/A /** A pointer back to tsunami to create interrupt the processor. */ 592810SN/A Tsunami* tsunami; 602810SN/A Tick interval; 616215Snate@binkert.org 628232Snate@binkert.org RTCEvent(Tsunami* t, Tick i); 638232Snate@binkert.org 645338Sstever@gmail.com /** Schedule the RTC periodic interrupt */ 6511375Sandreas.hansson@arm.com void scheduleIntr(); 662810SN/A 672810SN/A /** Event process to occur at interrupt*/ 688914Sandreas.hansson@arm.com virtual void process(); 698229Snate@binkert.org 705034SN/A /** Event description */ 712811SN/A virtual const char *description(); 728786Sgblack@eecs.umich.edu }; 734626SN/A 748833Sdam.sunwoo@arm.com private: 752810SN/A std::string _name; 762810SN/A const std::string &name() const { return _name; } 772810SN/A 782810SN/A /** RTC periodic interrupt event */ 792810SN/A RTCEvent event; 802810SN/A 8111375Sandreas.hansson@arm.com /** Current RTC register address/index */ 824628SN/A int addr; 834628SN/A 844628SN/A /** Data for real-time clock function */ 854628SN/A union { 864628SN/A uint8_t clock_data[10]; 874628SN/A 884628SN/A struct { 894628SN/A uint8_t sec; 908737Skoansin.tan@gmail.com uint8_t sec_alrm; 914628SN/A uint8_t min; 924628SN/A uint8_t min_alrm; 934628SN/A uint8_t hour; 944628SN/A uint8_t hour_alrm; 954628SN/A uint8_t wday; 964628SN/A uint8_t mday; 974628SN/A uint8_t mon; 984628SN/A uint8_t year; 994628SN/A }; 1004628SN/A }; 1018737Skoansin.tan@gmail.com 1024628SN/A /** RTC status register A */ 1038856Sandreas.hansson@arm.com uint8_t stat_regA; 1048856Sandreas.hansson@arm.com 1058856Sandreas.hansson@arm.com /** RTC status register B */ 1068856Sandreas.hansson@arm.com uint8_t stat_regB; 1078856Sandreas.hansson@arm.com 10810942Sandreas.hansson@arm.com public: 1098856Sandreas.hansson@arm.com RTC(const std::string &name, Tsunami* t, Tick i); 1108856Sandreas.hansson@arm.com 1118856Sandreas.hansson@arm.com /** Set the initial RTC time/date */ 1128922Swilliam.wang@arm.com void set_time(time_t t); 1132810SN/A 1148856Sandreas.hansson@arm.com /** RTC address port: write address of RTC RAM data to access */ 1152844SN/A void writeAddr(const uint8_t data); 1168856Sandreas.hansson@arm.com 1178856Sandreas.hansson@arm.com /** RTC write data */ 1188856Sandreas.hansson@arm.com void writeData(const uint8_t data); 11910713Sandreas.hansson@arm.com 1208856Sandreas.hansson@arm.com /** RTC read data */ 12110942Sandreas.hansson@arm.com void readData(uint8_t *data); 1228856Sandreas.hansson@arm.com 12310942Sandreas.hansson@arm.com /** 12410713Sandreas.hansson@arm.com * Serialize this object to the given output stream. 1258856Sandreas.hansson@arm.com * @param os The stream to serialize to. 1268856Sandreas.hansson@arm.com */ 1273738SN/A void serialize(const std::string &base, std::ostream &os); 1284458SN/A 1298856Sandreas.hansson@arm.com /** 13010713Sandreas.hansson@arm.com * Reconstruct the state of this object from a checkpoint. 13110713Sandreas.hansson@arm.com * @param cp The checkpoint use. 13210713Sandreas.hansson@arm.com * @param section The section name of this object 1338914Sandreas.hansson@arm.com */ 1342810SN/A void unserialize(const std::string &base, Checkpoint *cp, 1358856Sandreas.hansson@arm.com const std::string §ion); 1368856Sandreas.hansson@arm.com }; 1378856Sandreas.hansson@arm.com 1388914Sandreas.hansson@arm.com /** Programmable Interval Timer (Intel 8254) */ 1398856Sandreas.hansson@arm.com class PITimer 1408922Swilliam.wang@arm.com { 1418856Sandreas.hansson@arm.com /** Counter element for PIT */ 1423013SN/A class Counter 1438856Sandreas.hansson@arm.com { 1448856Sandreas.hansson@arm.com /** Event for counter interrupt */ 1458856Sandreas.hansson@arm.com class CounterEvent : public Event 1468856Sandreas.hansson@arm.com { 1478856Sandreas.hansson@arm.com private: 1488856Sandreas.hansson@arm.com /** Pointer back to Counter */ 1498856Sandreas.hansson@arm.com Counter* counter; 1508856Sandreas.hansson@arm.com Tick interval; 1518922Swilliam.wang@arm.com 1528856Sandreas.hansson@arm.com public: 1535314SN/A CounterEvent(Counter*); 1542811SN/A 1558856Sandreas.hansson@arm.com /** Event process */ 1568856Sandreas.hansson@arm.com virtual void process(); 1572810SN/A 1582810SN/A /** Event description */ 1598856Sandreas.hansson@arm.com virtual const char *description(); 1602810SN/A 1612810SN/A friend class Counter; 16210345SCurtis.Dunham@arm.com }; 16310345SCurtis.Dunham@arm.com 1648856Sandreas.hansson@arm.com private: 1658856Sandreas.hansson@arm.com std::string _name; 1668856Sandreas.hansson@arm.com const std::string &name() const { return _name; } 1678856Sandreas.hansson@arm.com 1683606SN/A CounterEvent event; 1698914Sandreas.hansson@arm.com 17010713Sandreas.hansson@arm.com /** Current count value */ 1718914Sandreas.hansson@arm.com uint16_t count; 1722810SN/A 1732810SN/A /** Latched count */ 1742897SN/A uint16_t latched_count; 1752897SN/A 1768856Sandreas.hansson@arm.com /** Interrupt period */ 1774458SN/A uint16_t period; 17810344Sandreas.hansson@arm.com 17910344Sandreas.hansson@arm.com /** Current mode of operation */ 18010344Sandreas.hansson@arm.com uint8_t mode; 18110344Sandreas.hansson@arm.com 1828856Sandreas.hansson@arm.com /** Output goes high when the counter reaches zero */ 1832811SN/A bool output_high; 1842810SN/A 1858856Sandreas.hansson@arm.com /** State of the count latch */ 1868856Sandreas.hansson@arm.com bool latch_on; 1873338SN/A 1884626SN/A /** Set of values for read_byte and write_byte */ 1894626SN/A enum {LSB, MSB}; 1904626SN/A 1914626SN/A /** Determine which byte of a 16-bit count value to read/write */ 1924626SN/A uint8_t read_byte, write_byte; 1934626SN/A 19411375Sandreas.hansson@arm.com public: 1954626SN/A Counter(const std::string &name); 19610693SMarco.Balboni@ARM.com 19711375Sandreas.hansson@arm.com /** Latch the current count (if one is not already latched) */ 19811375Sandreas.hansson@arm.com void latchCount(); 19910693SMarco.Balboni@ARM.com 20011375Sandreas.hansson@arm.com /** Set the read/write mode */ 2014628SN/A void setRW(int rw_val); 20211375Sandreas.hansson@arm.com 20311375Sandreas.hansson@arm.com /** Set operational mode */ 20410764Sandreas.hansson@arm.com void setMode(int mode_val); 20511375Sandreas.hansson@arm.com 20611375Sandreas.hansson@arm.com /** Set count encoding */ 2074628SN/A void setBCD(int bcd_val); 2084628SN/A 2094628SN/A /** Read a count byte */ 21011375Sandreas.hansson@arm.com void read(uint8_t *data); 2114628SN/A 21211375Sandreas.hansson@arm.com /** Write a count byte */ 21311375Sandreas.hansson@arm.com void write(const uint8_t data); 21411375Sandreas.hansson@arm.com 21511375Sandreas.hansson@arm.com /** Is the output high? */ 21611375Sandreas.hansson@arm.com bool outputHigh(); 2174628SN/A 2184628SN/A /** 2194628SN/A * Serialize this object to the given output stream. 2209347SAndreas.Sandberg@arm.com * @param os The stream to serialize to. 22111197Sandreas.hansson@arm.com */ 22211197Sandreas.hansson@arm.com void serialize(const std::string &base, std::ostream &os); 22311197Sandreas.hansson@arm.com 22411197Sandreas.hansson@arm.com /** 22511197Sandreas.hansson@arm.com * Reconstruct the state of this object from a checkpoint. 22611197Sandreas.hansson@arm.com * @param cp The checkpoint use. 22711197Sandreas.hansson@arm.com * @param section The section name of this object 22811197Sandreas.hansson@arm.com */ 22911197Sandreas.hansson@arm.com void unserialize(const std::string &base, Checkpoint *cp, 2309347SAndreas.Sandberg@arm.com const std::string §ion); 2319347SAndreas.Sandberg@arm.com }; 2329347SAndreas.Sandberg@arm.com 2339347SAndreas.Sandberg@arm.com private: 2349347SAndreas.Sandberg@arm.com std::string _name; 2359347SAndreas.Sandberg@arm.com const std::string &name() const { return _name; } 2369347SAndreas.Sandberg@arm.com 2379347SAndreas.Sandberg@arm.com /** PIT has three seperate counters */ 2389347SAndreas.Sandberg@arm.com Counter *counter[3]; 2399347SAndreas.Sandberg@arm.com 2409347SAndreas.Sandberg@arm.com public: 2419347SAndreas.Sandberg@arm.com /** Public way to access individual counters (avoid array accesses) */ 2429347SAndreas.Sandberg@arm.com Counter counter0; 2439347SAndreas.Sandberg@arm.com Counter counter1; 2449347SAndreas.Sandberg@arm.com Counter counter2; 2459347SAndreas.Sandberg@arm.com 2469347SAndreas.Sandberg@arm.com PITimer(const std::string &name); 2479347SAndreas.Sandberg@arm.com 24810821Sandreas.hansson@arm.com /** Write control word */ 24910821Sandreas.hansson@arm.com void writeControl(const uint8_t data); 25010821Sandreas.hansson@arm.com 25110821Sandreas.hansson@arm.com /** 25210821Sandreas.hansson@arm.com * Serialize this object to the given output stream. 25310821Sandreas.hansson@arm.com * @param os The stream to serialize to. 25410821Sandreas.hansson@arm.com */ 25510821Sandreas.hansson@arm.com void serialize(const std::string &base, std::ostream &os); 25610821Sandreas.hansson@arm.com 25710821Sandreas.hansson@arm.com /** 2584626SN/A * Reconstruct the state of this object from a checkpoint. 2596227Snate@binkert.org * @param cp The checkpoint use. 2604626SN/A * @param section The section name of this object 2614630SN/A */ 26210693SMarco.Balboni@ARM.com void unserialize(const std::string &base, Checkpoint *cp, 26310693SMarco.Balboni@ARM.com const std::string §ion); 2644630SN/A }; 26510693SMarco.Balboni@ARM.com 2669263Smrinmoy.ghosh@arm.com /** Mask of the PIC1 */ 2679263Smrinmoy.ghosh@arm.com uint8_t mask1; 26810693SMarco.Balboni@ARM.com 26910693SMarco.Balboni@ARM.com /** Mask of the PIC2 */ 27010693SMarco.Balboni@ARM.com uint8_t mask2; 27110693SMarco.Balboni@ARM.com 27210693SMarco.Balboni@ARM.com /** Mode of PIC1. Not used for anything */ 27310693SMarco.Balboni@ARM.com uint8_t mode1; 27410693SMarco.Balboni@ARM.com 27510693SMarco.Balboni@ARM.com /** Mode of PIC2. Not used for anything */ 27610693SMarco.Balboni@ARM.com uint8_t mode2; 27710693SMarco.Balboni@ARM.com 27810693SMarco.Balboni@ARM.com /** Raw PIC interrupt register before masking */ 27910693SMarco.Balboni@ARM.com uint8_t picr; //Raw PIC interrput register 28010693SMarco.Balboni@ARM.com 2819263Smrinmoy.ghosh@arm.com /** Is the pic interrupting right now or not. */ 2829288Sandreas.hansson@arm.com bool picInterrupting; 2834630SN/A 2844626SN/A /** A pointer to the Tsunami device which be belong to */ 2854626SN/A Tsunami *tsunami; 2864626SN/A 2876122SSteve.Reinhardt@amd.com /** Intel 8253 Periodic Interval Timer */ 28811331Sandreas.hansson@arm.com PITimer pitimer; 2894626SN/A 2902810SN/A RTC rtc; 29110884Sandreas.hansson@arm.com 29210884Sandreas.hansson@arm.com /** The interval is set via two writes to the PIT. 29310884Sandreas.hansson@arm.com * This variable contains a flag as to how many writes have happened, and 29410884Sandreas.hansson@arm.com * the time so far. 29510884Sandreas.hansson@arm.com */ 29610884Sandreas.hansson@arm.com uint16_t timerData; 29710884Sandreas.hansson@arm.com 29810884Sandreas.hansson@arm.com public: 2992810SN/A /** 3002810SN/A * Return the freqency of the RTC 3012810SN/A * @return interrupt rate of the RTC 3022810SN/A */ 3032810SN/A Tick frequency() const; 3046122SSteve.Reinhardt@amd.com 3056122SSteve.Reinhardt@amd.com struct Params : public BasicPioDevice::Params 3066122SSteve.Reinhardt@amd.com { 3072810SN/A Tick frequency; 3089288Sandreas.hansson@arm.com Tsunami *tsunami; 3092810SN/A time_t init_time; 3104626SN/A }; 3114626SN/A protected: 3122810SN/A const Params *params() const { return (const Params*)_params; } 3132810SN/A 3142810SN/A public: 3152810SN/A /** 3166122SSteve.Reinhardt@amd.com * Initialize all the data for devices supported by Tsunami I/O. 3176122SSteve.Reinhardt@amd.com * @param p pointer to Params struct 3186122SSteve.Reinhardt@amd.com */ 3199529Sandreas.hansson@arm.com TsunamiIO(Params *p); 3206122SSteve.Reinhardt@amd.com 3218833Sdam.sunwoo@arm.com virtual Tick read(Packet &pkt); 3228833Sdam.sunwoo@arm.com virtual Tick write(Packet &pkt); 3238833Sdam.sunwoo@arm.com 3246978SLisa.Hsu@amd.com /** 3252810SN/A * Post an PIC interrupt to the CPU via the CChip 3262810SN/A * @param bitvector interrupt to post. 3272810SN/A */ 3282810SN/A void postPIC(uint8_t bitvector); 3292810SN/A 3302810SN/A /** 33111483Snikos.nikoleris@arm.com * Clear a posted interrupt 33211483Snikos.nikoleris@arm.com * @param bitvector interrupt to clear 3335999Snate@binkert.org */ 3342810SN/A void clearPIC(uint8_t bitvector); 3352810SN/A 3362810SN/A /** 3372810SN/A * Serialize this object to the given output stream. 3382810SN/A * @param os The stream to serialize to. 33911483Snikos.nikoleris@arm.com */ 34011483Snikos.nikoleris@arm.com virtual void serialize(std::ostream &os); 3415999Snate@binkert.org 3422810SN/A /** 3432810SN/A * Reconstruct the state of this object from a checkpoint. 3442810SN/A * @param cp The checkpoint use. 3452810SN/A * @param section The section name of this object 3462810SN/A */ 3472810SN/A virtual void unserialize(Checkpoint *cp, const std::string §ion); 3482810SN/A 3492810SN/A}; 3502810SN/A 3515999Snate@binkert.org#endif // __DEV_TSUNAMI_IO_HH__ 3522810SN/A