tsunami_io.hh revision 918 
1/*
2 * Copyright (c) 2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/* @file
30 * Tsunami Fake I/O Space mapping including RTC/timer interrupts
31 */
32
33#ifndef __TSUNAMI_DMA_HH__
34#define __TSUNAMI_DMA_HH__
35
36#include "dev/io_device.hh"
37#include "base/range.hh"
38#include "dev/tsunami.hh"
39
40/** How often the RTC interrupts */
41static const int RTC_RATE  = 1024;
42
43/*
44 * Tsunami I/O device is a catch all for all the south bridge stuff we care
45 * to implement.
46 */
47class TsunamiIO : public PioDevice
48{
49  private:
50    /** The base address of this device */
51    Addr addr;
52
53    /** The size of mappad from the above address */
54    static const Addr size = 0xff;
55
56    struct tm tm;
57
58    /** In Tsunami RTC only has two i/o ports one for data and one for address,
59     * so you write the address and then read/write the data. This store the
60     * address you are going to be reading from on a read.
61     */
62    uint8_t RTCAddress;
63
64  protected:
65
66    /**
67     * The ClockEvent is handles the PIT interrupts
68     */
69    class ClockEvent : public Event
70    {
71      protected:
72        /** how often the PIT fires */
73        Tick interval;
74        /** The mode of the PIT */
75        uint8_t mode;
76        /** The status of the PIT */
77        uint8_t status;
78
79      public:
80        /**
81         * Just set the mode to 0
82         */
83        ClockEvent();
84
85        /**
86         * processs the timer event
87         */
88        virtual void process();
89
90        /**
91         * Returns a description of this event
92         * @return the description
93         */
94        virtual const char *description();
95
96        /**
97         * Schedule a timer interrupt to occur sometime in the future.
98         */
99        void Program(int count);
100
101        /**
102         * Write the mode bits of the PIT.
103         * @param mode the new mode
104         */
105        void ChangeMode(uint8_t mode);
106
107        /**
108         * The current PIT status.
109         * @return the status of the PIT
110         */
111        uint8_t Status();
112
113        /**
114         * Serialize this object to the given output stream.
115         * @param os The stream to serialize to.
116         */
117        virtual void serialize(std::ostream &os);
118
119
120        /**
121         * Reconstruct the state of this object from a checkpoint.
122         * @param cp The checkpoint use.
123         * @param section The section name of this object
124         */
125        virtual void unserialize(Checkpoint *cp, const std::string &section);
126     };
127
128    /**
129     * Process RTC timer events and generate interrupts appropriately.
130     */
131    class RTCEvent : public Event
132    {
133      protected:
134          /** A pointer back to tsunami to create interrupt the processor. */
135          Tsunami* tsunami;
136      public:
137          /** RTC Event initializes the RTC event by scheduling an event
138           * RTC_RATE times pre second. */
139          RTCEvent(Tsunami* t);
140
141          /**
142           * Interrupth the processor and reschedule the event.
143           * */
144          virtual void process();
145
146          /**
147           * Return a description of this event.
148           * @return a description
149           */
150          virtual const char *description();
151
152          /**
153           * Serialize this object to the given output stream.
154           * @param os The stream to serialize to.
155           */
156          virtual void serialize(std::ostream &os);
157
158
159          /**
160           * Reconstruct the state of this object from a checkpoint.
161           * @param cp The checkpoint use.
162           * @param section The section name of this object
163           */
164          virtual void unserialize(Checkpoint *cp, const std::string &section);
165     };
166
167    /** uip UpdateInProgess says that the rtc is updating, but we just fake it
168     * by alternating it on every read of the bit since we are going to
169     * override the loop_per_jiffy time that it is trying to use the UIP to
170     * calculate.
171     */
172    uint8_t uip;
173
174    /** Mask of the PIC1 */
175    uint8_t mask1;
176
177    /** Mask of the PIC2 */
178    uint8_t mask2;
179
180    /** Mode of PIC1. Not used for anything */
181    uint8_t mode1;
182
183    /** Mode of PIC2. Not used for anything */
184    uint8_t mode2;
185
186    /** Raw PIC interrupt register before masking */
187    uint8_t picr; //Raw PIC interrput register
188
189    /** Is the pic interrupting right now or not. */
190    bool picInterrupting;
191
192    /** A pointer to the Tsunami device which be belong to */
193    Tsunami *tsunami;
194
195    /**
196     * This timer is initilized, but after I wrote the code
197     * it doesn't seem to be used again, and best I can tell
198     * it too is not connected to any interrupt port
199     */
200    ClockEvent timer0;
201
202    /**
203     * This timer is used to control the speaker, which
204     * we normally could care less about, however it is
205     * also used to calculated the clockspeed and hense
206     * bogomips which is kinda important to the scheduler
207     * so we need to implemnt it although after boot I can't
208     * imagine we would be playing with the PC speaker much
209     */
210    ClockEvent timer2;
211
212    /** This is the event used to interrupt the cpu like an RTC.  */
213    RTCEvent rtc;
214
215    /** The interval is set via two writes to the PIT.
216     * This variable contains a flag as to how many writes have happened, and
217     * the time so far.
218     */
219    uint32_t timerData;
220
221
222  public:
223    /**
224     * Return the freqency of the RTC
225     * @return interrupt rate of the RTC
226     */
227    Tick  frequency() const { return RTC_RATE; }
228
229
230    /**
231     * Initialize all the data for devices supported by Tsunami I/O.
232     * @param name name of this device.
233     * @param t pointer back to the Tsunami object that we belong to.
234     * @param init_time Time (as in seconds since 1970) to set RTC to.
235     * @param a address we are mapped at.
236     * @param mmu pointer to the memory controller that sends us events.
237     */
238    TsunamiIO(const std::string &name, Tsunami *t, time_t init_time,
239              Addr a, MemoryController *mmu, HierParams *hier, Bus *bus);
240
241    /**
242     * Create the tm struct from seconds since 1970
243     */
244    void set_time(time_t t);
245
246    /**
247      * Process a read to one of the devices we are emulating.
248      * @param req Contains the address to read from.
249      * @param data A pointer to write the read data to.
250      * @return The fault condition of the access.
251      */
252    virtual Fault read(MemReqPtr &req, uint8_t *data);
253
254    /**
255      * Process a write to one of the devices we emulate.
256      * @param req Contains the address to write to.
257      * @param data The data to write.
258      * @return The fault condition of the access.
259      */
260    virtual Fault write(MemReqPtr &req, const uint8_t *data);
261
262    /**
263     * Post an PIC interrupt to the CPU via the CChip
264     * @param bitvector interrupt to post.
265     */
266    void postPIC(uint8_t bitvector);
267
268    /**
269     * Clear a posted interrupt
270     * @param bitvector interrupt to clear
271     */
272    void clearPIC(uint8_t bitvector);
273
274    /**
275     * Serialize this object to the given output stream.
276     * @param os The stream to serialize to.
277     */
278    virtual void serialize(std::ostream &os);
279
280
281    /**
282     * Reconstruct the state of this object from a checkpoint.
283     * @param cp The checkpoint use.
284     * @param section The section name of this object
285     */
286    virtual void unserialize(Checkpoint *cp, const std::string &section);
287
288
289    Tick cacheAccess(MemReqPtr &req);
290};
291
292#endif // __TSUNAMI_IO_HH__
293