tsunami_io.hh revision 5606
1768SN/A/*
21762SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan
3768SN/A * All rights reserved.
4768SN/A *
5768SN/A * Redistribution and use in source and binary forms, with or without
6768SN/A * modification, are permitted provided that the following conditions are
7768SN/A * met: redistributions of source code must retain the above copyright
8768SN/A * notice, this list of conditions and the following disclaimer;
9768SN/A * redistributions in binary form must reproduce the above copyright
10768SN/A * notice, this list of conditions and the following disclaimer in the
11768SN/A * documentation and/or other materials provided with the distribution;
12768SN/A * neither the name of the copyright holders nor the names of its
13768SN/A * contributors may be used to endorse or promote products derived from
14768SN/A * this software without specific prior written permission.
15768SN/A *
16768SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17768SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18768SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19768SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20768SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21768SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22768SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23768SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24768SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25768SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26768SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665SN/A *
282665SN/A * Authors: Ali Saidi
292665SN/A *          Andrew Schultz
302665SN/A *          Miguel Serrano
31768SN/A */
32768SN/A
331722SN/A/** @file
341722SN/A * Tsunami I/O Space mapping including RTC/timer interrupts
35768SN/A */
36768SN/A
371401SN/A#ifndef __DEV_TSUNAMI_IO_HH__
381401SN/A#define __DEV_TSUNAMI_IO_HH__
39768SN/A
40909SN/A#include "base/range.hh"
413540Sgblack@eecs.umich.edu#include "dev/alpha/tsunami.hh"
425443Sgblack@eecs.umich.edu#include "dev/intel_8254_timer.hh"
435392Sgblack@eecs.umich.edu#include "dev/mc146818.hh"
444762Snate@binkert.org#include "dev/io_device.hh"
454762Snate@binkert.org#include "params/TsunamiIO.hh"
46932SN/A#include "sim/eventq.hh"
47768SN/A
481722SN/A/**
49885SN/A * Tsunami I/O device is a catch all for all the south bridge stuff we care
50885SN/A * to implement.
51768SN/A */
522542SN/Aclass TsunamiIO : public BasicPioDevice
53768SN/A{
54809SN/A  private:
55773SN/A    struct tm tm;
56773SN/A
57768SN/A  protected:
585392Sgblack@eecs.umich.edu
595606Snate@binkert.org    class RTC : public MC146818
601854SN/A    {
615392Sgblack@eecs.umich.edu      public:
625606Snate@binkert.org        Tsunami *tsunami;
635606Snate@binkert.org        RTC(const std::string &n, const TsunamiIOParams *p);
645392Sgblack@eecs.umich.edu
655392Sgblack@eecs.umich.edu      protected:
665392Sgblack@eecs.umich.edu        void handleEvent()
671854SN/A        {
685392Sgblack@eecs.umich.edu            //Actually interrupt the processor here
695392Sgblack@eecs.umich.edu            tsunami->cchip->postRTC();
705392Sgblack@eecs.umich.edu        }
711817SN/A    };
72771SN/A
73885SN/A    /** Mask of the PIC1 */
74803SN/A    uint8_t mask1;
75885SN/A
76885SN/A    /** Mask of the PIC2 */
77803SN/A    uint8_t mask2;
78885SN/A
79885SN/A    /** Mode of PIC1. Not used for anything */
80803SN/A    uint8_t mode1;
81885SN/A
82885SN/A    /** Mode of PIC2. Not used for anything */
83803SN/A    uint8_t mode2;
84769SN/A
85885SN/A    /** Raw PIC interrupt register before masking */
86885SN/A    uint8_t picr; //Raw PIC interrput register
87885SN/A
88885SN/A    /** Is the pic interrupting right now or not. */
89777SN/A    bool picInterrupting;
90777SN/A
91885SN/A    /** A pointer to the Tsunami device which be belong to */
92775SN/A    Tsunami *tsunami;
93775SN/A
941817SN/A    /** Intel 8253 Periodic Interval Timer */
955443Sgblack@eecs.umich.edu    Intel8254Timer pitimer;
96773SN/A
975606Snate@binkert.org    RTC rtc;
985392Sgblack@eecs.umich.edu
995392Sgblack@eecs.umich.edu    uint8_t rtcAddr;
100773SN/A
101885SN/A    /** The interval is set via two writes to the PIT.
102885SN/A     * This variable contains a flag as to how many writes have happened, and
103885SN/A     * the time so far.
104885SN/A     */
1051817SN/A    uint16_t timerData;
106771SN/A
107768SN/A  public:
108891SN/A    /**
109891SN/A     * Return the freqency of the RTC
110891SN/A     * @return interrupt rate of the RTC
111891SN/A     */
1121634SN/A    Tick frequency() const;
113775SN/A
1142539SN/A  public:
1154762Snate@binkert.org    typedef TsunamiIOParams Params;
116885SN/A    /**
117885SN/A     * Initialize all the data for devices supported by Tsunami I/O.
1182539SN/A     * @param p pointer to Params struct
119885SN/A     */
1204762Snate@binkert.org    TsunamiIO(const Params *p);
1214762Snate@binkert.org
1224762Snate@binkert.org    const Params *
1234762Snate@binkert.org    params() const
1244762Snate@binkert.org    {
1254762Snate@binkert.org        return dynamic_cast<const Params *>(_params);
1264762Snate@binkert.org    }
127768SN/A
1283349SN/A    virtual Tick read(PacketPtr pkt);
1293349SN/A    virtual Tick write(PacketPtr pkt);
130768SN/A
131885SN/A    /**
132885SN/A     * Post an PIC interrupt to the CPU via the CChip
133885SN/A     * @param bitvector interrupt to post.
134885SN/A     */
135777SN/A    void postPIC(uint8_t bitvector);
136885SN/A
137885SN/A    /**
138885SN/A     * Clear a posted interrupt
139885SN/A     * @param bitvector interrupt to clear
140885SN/A     */
141777SN/A    void clearPIC(uint8_t bitvector);
142777SN/A
143885SN/A    /**
144885SN/A     * Serialize this object to the given output stream.
145885SN/A     * @param os The stream to serialize to.
146885SN/A     */
147768SN/A    virtual void serialize(std::ostream &os);
148885SN/A
149885SN/A    /**
150885SN/A     * Reconstruct the state of this object from a checkpoint.
151885SN/A     * @param cp The checkpoint use.
152885SN/A     * @param section The section name of this object
153885SN/A     */
154768SN/A    virtual void unserialize(Checkpoint *cp, const std::string &section);
155909SN/A
156768SN/A};
157768SN/A
1581401SN/A#endif // __DEV_TSUNAMI_IO_HH__
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