tsunami_io.hh revision 5606
112771Sqtt2@cornell.edu/*
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312771Sqtt2@cornell.edu * All rights reserved.
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1012771Sqtt2@cornell.edu * notice, this list of conditions and the following disclaimer in the
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2712771Sqtt2@cornell.edu *
2812771Sqtt2@cornell.edu * Authors: Ali Saidi
2912771Sqtt2@cornell.edu *          Andrew Schultz
3012771Sqtt2@cornell.edu *          Miguel Serrano
3112771Sqtt2@cornell.edu */
3212771Sqtt2@cornell.edu
3312771Sqtt2@cornell.edu/** @file
3412771Sqtt2@cornell.edu * Tsunami I/O Space mapping including RTC/timer interrupts
3512771Sqtt2@cornell.edu */
3612771Sqtt2@cornell.edu
3712771Sqtt2@cornell.edu#ifndef __DEV_TSUNAMI_IO_HH__
3812771Sqtt2@cornell.edu#define __DEV_TSUNAMI_IO_HH__
3912771Sqtt2@cornell.edu
4012771Sqtt2@cornell.edu#include "base/range.hh"
4112771Sqtt2@cornell.edu#include "dev/alpha/tsunami.hh"
42#include "dev/intel_8254_timer.hh"
43#include "dev/mc146818.hh"
44#include "dev/io_device.hh"
45#include "params/TsunamiIO.hh"
46#include "sim/eventq.hh"
47
48/**
49 * Tsunami I/O device is a catch all for all the south bridge stuff we care
50 * to implement.
51 */
52class TsunamiIO : public BasicPioDevice
53{
54  private:
55    struct tm tm;
56
57  protected:
58
59    class RTC : public MC146818
60    {
61      public:
62        Tsunami *tsunami;
63        RTC(const std::string &n, const TsunamiIOParams *p);
64
65      protected:
66        void handleEvent()
67        {
68            //Actually interrupt the processor here
69            tsunami->cchip->postRTC();
70        }
71    };
72
73    /** Mask of the PIC1 */
74    uint8_t mask1;
75
76    /** Mask of the PIC2 */
77    uint8_t mask2;
78
79    /** Mode of PIC1. Not used for anything */
80    uint8_t mode1;
81
82    /** Mode of PIC2. Not used for anything */
83    uint8_t mode2;
84
85    /** Raw PIC interrupt register before masking */
86    uint8_t picr; //Raw PIC interrput register
87
88    /** Is the pic interrupting right now or not. */
89    bool picInterrupting;
90
91    /** A pointer to the Tsunami device which be belong to */
92    Tsunami *tsunami;
93
94    /** Intel 8253 Periodic Interval Timer */
95    Intel8254Timer pitimer;
96
97    RTC rtc;
98
99    uint8_t rtcAddr;
100
101    /** The interval is set via two writes to the PIT.
102     * This variable contains a flag as to how many writes have happened, and
103     * the time so far.
104     */
105    uint16_t timerData;
106
107  public:
108    /**
109     * Return the freqency of the RTC
110     * @return interrupt rate of the RTC
111     */
112    Tick frequency() const;
113
114  public:
115    typedef TsunamiIOParams Params;
116    /**
117     * Initialize all the data for devices supported by Tsunami I/O.
118     * @param p pointer to Params struct
119     */
120    TsunamiIO(const Params *p);
121
122    const Params *
123    params() const
124    {
125        return dynamic_cast<const Params *>(_params);
126    }
127
128    virtual Tick read(PacketPtr pkt);
129    virtual Tick write(PacketPtr pkt);
130
131    /**
132     * Post an PIC interrupt to the CPU via the CChip
133     * @param bitvector interrupt to post.
134     */
135    void postPIC(uint8_t bitvector);
136
137    /**
138     * Clear a posted interrupt
139     * @param bitvector interrupt to clear
140     */
141    void clearPIC(uint8_t bitvector);
142
143    /**
144     * Serialize this object to the given output stream.
145     * @param os The stream to serialize to.
146     */
147    virtual void serialize(std::ostream &os);
148
149    /**
150     * Reconstruct the state of this object from a checkpoint.
151     * @param cp The checkpoint use.
152     * @param section The section name of this object
153     */
154    virtual void unserialize(Checkpoint *cp, const std::string &section);
155
156};
157
158#endif // __DEV_TSUNAMI_IO_HH__
159