tsunami_io.hh revision 1722
1/*
2 * Copyright (c) 2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @file
30 * Tsunami I/O Space mapping including RTC/timer interrupts
31 */
32
33#ifndef __DEV_TSUNAMI_IO_HH__
34#define __DEV_TSUNAMI_IO_HH__
35
36#include "dev/io_device.hh"
37#include "base/range.hh"
38#include "dev/tsunami.hh"
39#include "sim/eventq.hh"
40
41/**
42 * Tsunami I/O device is a catch all for all the south bridge stuff we care
43 * to implement.
44 */
45class TsunamiIO : public PioDevice
46{
47  private:
48    /** The base address of this device */
49    Addr addr;
50
51    /** The size of mappad from the above address */
52    static const Addr size = 0xff;
53
54    struct tm tm;
55
56    /**
57     * In Tsunami RTC only has two i/o ports one for data and one for
58     * address, so you write the address and then read/write the
59     * data. This store the address you are going to be reading from
60     * on a read.
61     */
62    uint8_t RTCAddress;
63
64  protected:
65
66    /**
67     * The ClockEvent is handles the PIT interrupts
68     */
69    class ClockEvent : public Event
70    {
71      protected:
72        /** how often the PIT fires */
73        Tick interval;
74        /** The mode of the PIT */
75        uint8_t mode;
76        /** The status of the PIT */
77        uint8_t status;
78
79      public:
80        /**
81         * Just set the mode to 0
82         */
83        ClockEvent();
84
85        /**
86         * processs the timer event
87         */
88        virtual void process();
89
90        /**
91         * Returns a description of this event
92         * @return the description
93         */
94        virtual const char *description();
95
96        /**
97         * Schedule a timer interrupt to occur sometime in the future.
98         */
99        void Program(int count);
100
101        /**
102         * Write the mode bits of the PIT.
103         * @param mode the new mode
104         */
105        void ChangeMode(uint8_t mode);
106
107        /**
108         * The current PIT status.
109         * @return the status of the PIT
110         */
111        uint8_t Status();
112
113        /**
114         * Serialize this object to the given output stream.
115         * @param os The stream to serialize to.
116         */
117        virtual void serialize(std::ostream &os);
118
119
120        /**
121         * Reconstruct the state of this object from a checkpoint.
122         * @param cp The checkpoint use.
123         * @param section The section name of this object
124         */
125        virtual void unserialize(Checkpoint *cp, const std::string &section);
126     };
127
128    /**
129     * Process RTC timer events and generate interrupts appropriately.
130     */
131    class RTCEvent : public Event
132    {
133      protected:
134        /** A pointer back to tsunami to create interrupt the processor. */
135        Tsunami* tsunami;
136        Tick interval;
137
138      public:
139        /**
140         * RTC Event initializes the RTC event by scheduling an event
141         * RTC_RATE times pre second.
142         */
143        RTCEvent(Tsunami* t, Tick i);
144
145        /**
146         * Interrupth the processor and reschedule the event.
147         */
148        virtual void process();
149
150        /**
151         * Return a description of this event.
152         * @return a description
153         */
154        virtual const char *description();
155
156        /**
157         * Serialize this object to the given output stream.
158         * @param os The stream to serialize to.
159         */
160        virtual void serialize(std::ostream &os);
161
162        /**
163         * Reconstruct the state of this object from a checkpoint.
164         * @param cp The checkpoint use.
165         * @param section The section name of this object
166         */
167        virtual void unserialize(Checkpoint *cp, const std::string &section);
168    };
169
170    /** uip UpdateInProgess says that the rtc is updating, but we just fake it
171     * by alternating it on every read of the bit since we are going to
172     * override the loop_per_jiffy time that it is trying to use the UIP to
173     * calculate.
174     */
175    uint8_t uip;
176
177    /** Mask of the PIC1 */
178    uint8_t mask1;
179
180    /** Mask of the PIC2 */
181    uint8_t mask2;
182
183    /** Mode of PIC1. Not used for anything */
184    uint8_t mode1;
185
186    /** Mode of PIC2. Not used for anything */
187    uint8_t mode2;
188
189    /** Raw PIC interrupt register before masking */
190    uint8_t picr; //Raw PIC interrput register
191
192    /** Is the pic interrupting right now or not. */
193    bool picInterrupting;
194
195    Tick clockInterval;
196
197    /** A pointer to the Tsunami device which be belong to */
198    Tsunami *tsunami;
199
200    /**
201     * This timer is initilized, but after I wrote the code
202     * it doesn't seem to be used again, and best I can tell
203     * it too is not connected to any interrupt port
204     */
205    ClockEvent timer0;
206
207    /**
208     * This timer is used to control the speaker, which
209     * we normally could care less about, however it is
210     * also used to calculated the clockspeed and hense
211     * bogomips which is kinda important to the scheduler
212     * so we need to implemnt it although after boot I can't
213     * imagine we would be playing with the PC speaker much
214     */
215    ClockEvent timer2;
216
217    /** This is the event used to interrupt the cpu like an RTC.  */
218    RTCEvent rtc;
219
220    /** The interval is set via two writes to the PIT.
221     * This variable contains a flag as to how many writes have happened, and
222     * the time so far.
223     */
224    uint32_t timerData;
225
226  public:
227    /**
228     * Return the freqency of the RTC
229     * @return interrupt rate of the RTC
230     */
231    Tick frequency() const;
232
233    /**
234     * Initialize all the data for devices supported by Tsunami I/O.
235     * @param name name of this device.
236     * @param t pointer back to the Tsunami object that we belong to.
237     * @param init_time Time (as in seconds since 1970) to set RTC to.
238     * @param a address we are mapped at.
239     * @param mmu pointer to the memory controller that sends us events.
240     */
241    TsunamiIO(const std::string &name, Tsunami *t, time_t init_time,
242              Addr a, MemoryController *mmu, HierParams *hier, Bus *bus,
243              Tick pio_latency, Tick ci);
244
245    /**
246     * Create the tm struct from seconds since 1970
247     */
248    void set_time(time_t t);
249
250    /**
251      * Process a read to one of the devices we are emulating.
252      * @param req Contains the address to read from.
253      * @param data A pointer to write the read data to.
254      * @return The fault condition of the access.
255      */
256    virtual Fault read(MemReqPtr &req, uint8_t *data);
257
258    /**
259      * Process a write to one of the devices we emulate.
260      * @param req Contains the address to write to.
261      * @param data The data to write.
262      * @return The fault condition of the access.
263      */
264    virtual Fault write(MemReqPtr &req, const uint8_t *data);
265
266    /**
267     * Post an PIC interrupt to the CPU via the CChip
268     * @param bitvector interrupt to post.
269     */
270    void postPIC(uint8_t bitvector);
271
272    /**
273     * Clear a posted interrupt
274     * @param bitvector interrupt to clear
275     */
276    void clearPIC(uint8_t bitvector);
277
278    /**
279     * Serialize this object to the given output stream.
280     * @param os The stream to serialize to.
281     */
282    virtual void serialize(std::ostream &os);
283
284    /**
285     * Reconstruct the state of this object from a checkpoint.
286     * @param cp The checkpoint use.
287     * @param section The section name of this object
288     */
289    virtual void unserialize(Checkpoint *cp, const std::string &section);
290
291    Tick cacheAccess(MemReqPtr &req);
292};
293
294#endif // __DEV_TSUNAMI_IO_HH__
295