backdoor.cc revision 5480
12SN/A/* 21762SN/A * Copyright (c) 2001-2005 The Regents of The University of Michigan 32SN/A * All rights reserved. 42SN/A * 52SN/A * Redistribution and use in source and binary forms, with or without 62SN/A * modification, are permitted provided that the following conditions are 72SN/A * met: redistributions of source code must retain the above copyright 82SN/A * notice, this list of conditions and the following disclaimer; 92SN/A * redistributions in binary form must reproduce the above copyright 102SN/A * notice, this list of conditions and the following disclaimer in the 112SN/A * documentation and/or other materials provided with the distribution; 122SN/A * neither the name of the copyright holders nor the names of its 132SN/A * contributors may be used to endorse or promote products derived from 142SN/A * this software without specific prior written permission. 152SN/A * 162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665SN/A * 282665SN/A * Authors: Nathan Binkert 292665SN/A * Ali Saidi 302665SN/A * Steve Reinhardt 312665SN/A * Erik Hallnor 322SN/A */ 332SN/A 341722SN/A/** @file 355480Snate@binkert.org * Alpha Console Backdoor Definition 362SN/A */ 372SN/A 38146SN/A#include <cstddef> 392SN/A#include <string> 402SN/A 412158SN/A#include "arch/alpha/system.hh" 42146SN/A#include "base/inifile.hh" 431805SN/A#include "base/str.hh" 44146SN/A#include "base/trace.hh" 451717SN/A#include "cpu/base.hh" 462680SN/A#include "cpu/thread_context.hh" 475480Snate@binkert.org#include "dev/alpha/backdoor.hh" 482521SN/A#include "dev/platform.hh" 4956SN/A#include "dev/simple_disk.hh" 505478SN/A#include "dev/terminal.hh" 513348SN/A#include "mem/packet.hh" 523348SN/A#include "mem/packet_access.hh" 532521SN/A#include "mem/physical.hh" 545480Snate@binkert.org#include "params/AlphaBackdoor.hh" 551805SN/A#include "sim/sim_object.hh" 562SN/A 572SN/Ausing namespace std; 582107SN/Ausing namespace AlphaISA; 592SN/A 605480Snate@binkert.orgAlphaBackdoor::AlphaBackdoor(const Params *p) 615478SN/A : BasicPioDevice(p), disk(p->disk), terminal(p->terminal), 624762SN/A system(p->system), cpu(p->cpu) 632SN/A{ 64545SN/A 652521SN/A pioSize = sizeof(struct AlphaAccess); 662521SN/A 672521SN/A alphaAccess = new Access(); 682521SN/A alphaAccess->last_offset = pioSize - 1; 692SN/A 702SN/A alphaAccess->version = ALPHA_ACCESS_VERSION; 712SN/A alphaAccess->diskUnit = 1; 72926SN/A 73926SN/A alphaAccess->diskCount = 0; 74926SN/A alphaAccess->diskPAddr = 0; 75926SN/A alphaAccess->diskBlock = 0; 76926SN/A alphaAccess->diskOperation = 0; 77926SN/A alphaAccess->outputChar = 0; 78926SN/A alphaAccess->inputChar = 0; 794395SN/A std::memset(alphaAccess->cpuStack, 0, sizeof(alphaAccess->cpuStack)); 801805SN/A 812SN/A} 822SN/A 831634SN/Avoid 845480Snate@binkert.orgAlphaBackdoor::startup() 851634SN/A{ 862549SN/A system->setAlphaAccess(pioAddr); 871806SN/A alphaAccess->numCPUs = system->getNumCPUs(); 881634SN/A alphaAccess->kernStart = system->getKernelStart(); 891634SN/A alphaAccess->kernEnd = system->getKernelEnd(); 901634SN/A alphaAccess->entryPoint = system->getKernelEntry(); 911634SN/A alphaAccess->mem_size = system->physmem->size(); 921634SN/A alphaAccess->cpuClock = cpu->frequency() / 1000000; // In MHz 932521SN/A alphaAccess->intrClockFrequency = params()->platform->intrFrequency(); 941634SN/A} 951634SN/A 962512SN/ATick 975480Snate@binkert.orgAlphaBackdoor::read(PacketPtr pkt) 982SN/A{ 992SN/A 1002512SN/A /** XXX Do we want to push the addr munging to a bus brige or something? So 1012512SN/A * the device has it's physical address and then the bridge adds on whatever 1022512SN/A * machine dependent address swizzle is required? 1032512SN/A */ 104540SN/A 1052641SN/A assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 1062522SN/A 1072641SN/A Addr daddr = pkt->getAddr() - pioAddr; 1082512SN/A 1092630SN/A pkt->allocate(); 1104986SN/A pkt->makeAtomicResponse(); 1112521SN/A 1122641SN/A switch (pkt->getSize()) 113873SN/A { 114873SN/A case sizeof(uint32_t): 115873SN/A switch (daddr) 116873SN/A { 117873SN/A case offsetof(AlphaAccess, last_offset): 1182630SN/A pkt->set(alphaAccess->last_offset); 119873SN/A break; 120873SN/A case offsetof(AlphaAccess, version): 1212630SN/A pkt->set(alphaAccess->version); 122873SN/A break; 123873SN/A case offsetof(AlphaAccess, numCPUs): 1242630SN/A pkt->set(alphaAccess->numCPUs); 125873SN/A break; 126873SN/A case offsetof(AlphaAccess, intrClockFrequency): 1272630SN/A pkt->set(alphaAccess->intrClockFrequency); 128873SN/A break; 129873SN/A default: 1302512SN/A /* Old console code read in everyting as a 32bit int 1312512SN/A * we now break that for better error checking. 1322512SN/A */ 1334870SN/A pkt->setBadAddress(); 134873SN/A } 1355480Snate@binkert.org DPRINTF(AlphaBackdoor, "read: offset=%#x val=%#x\n", daddr, 1362630SN/A pkt->get<uint32_t>()); 137873SN/A break; 138873SN/A case sizeof(uint64_t): 139873SN/A switch (daddr) 140873SN/A { 141873SN/A case offsetof(AlphaAccess, inputChar): 1425478SN/A pkt->set(terminal->console_in()); 143873SN/A break; 144873SN/A case offsetof(AlphaAccess, cpuClock): 1452630SN/A pkt->set(alphaAccess->cpuClock); 146873SN/A break; 147873SN/A case offsetof(AlphaAccess, mem_size): 1482630SN/A pkt->set(alphaAccess->mem_size); 149873SN/A break; 150873SN/A case offsetof(AlphaAccess, kernStart): 1512630SN/A pkt->set(alphaAccess->kernStart); 152873SN/A break; 153873SN/A case offsetof(AlphaAccess, kernEnd): 1542630SN/A pkt->set(alphaAccess->kernEnd); 155873SN/A break; 156873SN/A case offsetof(AlphaAccess, entryPoint): 1572630SN/A pkt->set(alphaAccess->entryPoint); 158873SN/A break; 159873SN/A case offsetof(AlphaAccess, diskUnit): 1602630SN/A pkt->set(alphaAccess->diskUnit); 161873SN/A break; 162873SN/A case offsetof(AlphaAccess, diskCount): 1632630SN/A pkt->set(alphaAccess->diskCount); 164873SN/A break; 165873SN/A case offsetof(AlphaAccess, diskPAddr): 1662630SN/A pkt->set(alphaAccess->diskPAddr); 167873SN/A break; 168873SN/A case offsetof(AlphaAccess, diskBlock): 1692630SN/A pkt->set(alphaAccess->diskBlock); 170873SN/A break; 171873SN/A case offsetof(AlphaAccess, diskOperation): 1722630SN/A pkt->set(alphaAccess->diskOperation); 173873SN/A break; 174873SN/A case offsetof(AlphaAccess, outputChar): 1752630SN/A pkt->set(alphaAccess->outputChar); 176873SN/A break; 177873SN/A default: 1782114SN/A int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) / 1792114SN/A sizeof(alphaAccess->cpuStack[0]); 1802114SN/A 1812114SN/A if (cpunum >= 0 && cpunum < 64) 1822630SN/A pkt->set(alphaAccess->cpuStack[cpunum]); 1832114SN/A else 1842114SN/A panic("Unknown 64bit access, %#x\n", daddr); 185873SN/A } 1865480Snate@binkert.org DPRINTF(AlphaBackdoor, "read: offset=%#x val=%#x\n", daddr, 1872630SN/A pkt->get<uint64_t>()); 188873SN/A break; 189873SN/A default: 1904870SN/A pkt->setBadAddress(); 1912SN/A } 1922512SN/A return pioDelay; 1932SN/A} 1942SN/A 1952512SN/ATick 1965480Snate@binkert.orgAlphaBackdoor::write(PacketPtr pkt) 1972SN/A{ 1982641SN/A assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 1992641SN/A Addr daddr = pkt->getAddr() - pioAddr; 200430SN/A 2012630SN/A uint64_t val = pkt->get<uint64_t>(); 2022641SN/A assert(pkt->getSize() == sizeof(uint64_t)); 2032SN/A 204430SN/A switch (daddr) { 205430SN/A case offsetof(AlphaAccess, diskUnit): 2062SN/A alphaAccess->diskUnit = val; 207430SN/A break; 2082SN/A 209430SN/A case offsetof(AlphaAccess, diskCount): 2102SN/A alphaAccess->diskCount = val; 211430SN/A break; 2122SN/A 213430SN/A case offsetof(AlphaAccess, diskPAddr): 2142SN/A alphaAccess->diskPAddr = val; 215430SN/A break; 2162SN/A 217430SN/A case offsetof(AlphaAccess, diskBlock): 2182SN/A alphaAccess->diskBlock = val; 219430SN/A break; 2202SN/A 221430SN/A case offsetof(AlphaAccess, diskOperation): 2222SN/A if (val == 0x13) 2232SN/A disk->read(alphaAccess->diskPAddr, alphaAccess->diskBlock, 2242SN/A alphaAccess->diskCount); 2252SN/A else 2262SN/A panic("Invalid disk operation!"); 2272SN/A 228430SN/A break; 2292SN/A 230430SN/A case offsetof(AlphaAccess, outputChar): 2315478SN/A terminal->out((char)(val & 0xff)); 232430SN/A break; 2332SN/A 234430SN/A default: 2352114SN/A int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) / 2362114SN/A sizeof(alphaAccess->cpuStack[0]); 2372114SN/A warn("%d: Trying to launch CPU number %d!", curTick, cpunum); 2382114SN/A assert(val > 0 && "Must not access primary cpu"); 2392114SN/A if (cpunum >= 0 && cpunum < 64) 2402114SN/A alphaAccess->cpuStack[cpunum] = val; 2412114SN/A else 2422114SN/A panic("Unknown 64bit access, %#x\n", daddr); 2432SN/A } 2442SN/A 2454870SN/A pkt->makeAtomicResponse(); 2462SN/A 2472512SN/A return pioDelay; 248545SN/A} 249545SN/A 2502SN/Avoid 2515480Snate@binkert.orgAlphaBackdoor::Access::serialize(ostream &os) 2522SN/A{ 253222SN/A SERIALIZE_SCALAR(last_offset); 254222SN/A SERIALIZE_SCALAR(version); 255222SN/A SERIALIZE_SCALAR(numCPUs); 256222SN/A SERIALIZE_SCALAR(mem_size); 257222SN/A SERIALIZE_SCALAR(cpuClock); 258222SN/A SERIALIZE_SCALAR(intrClockFrequency); 259222SN/A SERIALIZE_SCALAR(kernStart); 260222SN/A SERIALIZE_SCALAR(kernEnd); 261222SN/A SERIALIZE_SCALAR(entryPoint); 262222SN/A SERIALIZE_SCALAR(diskUnit); 263222SN/A SERIALIZE_SCALAR(diskCount); 264222SN/A SERIALIZE_SCALAR(diskPAddr); 265222SN/A SERIALIZE_SCALAR(diskBlock); 266222SN/A SERIALIZE_SCALAR(diskOperation); 267222SN/A SERIALIZE_SCALAR(outputChar); 268430SN/A SERIALIZE_SCALAR(inputChar); 2692114SN/A SERIALIZE_ARRAY(cpuStack,64); 2702SN/A} 2712SN/A 2722SN/Avoid 2735480Snate@binkert.orgAlphaBackdoor::Access::unserialize(Checkpoint *cp, const std::string §ion) 2742SN/A{ 275222SN/A UNSERIALIZE_SCALAR(last_offset); 276222SN/A UNSERIALIZE_SCALAR(version); 277222SN/A UNSERIALIZE_SCALAR(numCPUs); 278222SN/A UNSERIALIZE_SCALAR(mem_size); 279222SN/A UNSERIALIZE_SCALAR(cpuClock); 280222SN/A UNSERIALIZE_SCALAR(intrClockFrequency); 281222SN/A UNSERIALIZE_SCALAR(kernStart); 282222SN/A UNSERIALIZE_SCALAR(kernEnd); 283222SN/A UNSERIALIZE_SCALAR(entryPoint); 284222SN/A UNSERIALIZE_SCALAR(diskUnit); 285222SN/A UNSERIALIZE_SCALAR(diskCount); 286222SN/A UNSERIALIZE_SCALAR(diskPAddr); 287222SN/A UNSERIALIZE_SCALAR(diskBlock); 288222SN/A UNSERIALIZE_SCALAR(diskOperation); 289222SN/A UNSERIALIZE_SCALAR(outputChar); 290430SN/A UNSERIALIZE_SCALAR(inputChar); 2912114SN/A UNSERIALIZE_ARRAY(cpuStack, 64); 292217SN/A} 2932SN/A 294217SN/Avoid 2955480Snate@binkert.orgAlphaBackdoor::serialize(ostream &os) 296217SN/A{ 297217SN/A alphaAccess->serialize(os); 298217SN/A} 299217SN/A 300217SN/Avoid 3015480Snate@binkert.orgAlphaBackdoor::unserialize(Checkpoint *cp, const std::string §ion) 302217SN/A{ 303237SN/A alphaAccess->unserialize(cp, section); 3042SN/A} 3052SN/A 3065480Snate@binkert.orgAlphaBackdoor * 3075480Snate@binkert.orgAlphaBackdoorParams::create() 3082SN/A{ 3095480Snate@binkert.org return new AlphaBackdoor(this); 3102SN/A} 311