1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Nathan Binkert 29 * Ali Saidi 30 * Steve Reinhardt 31 * Erik Hallnor 32 */ 33 34/** @file 35 * Alpha Console Backdoor Definition 36 */ 37 38#include "dev/alpha/backdoor.hh" 39 40#include <cstddef> 41#include <string> 42 43#include "arch/alpha/system.hh" 44#include "base/inifile.hh" 45#include "base/str.hh" 46#include "base/trace.hh" 47#include "cpu/base.hh" 48#include "cpu/thread_context.hh" 49#include "debug/AlphaBackdoor.hh" 50#include "dev/alpha/tsunami.hh" 51#include "dev/alpha/tsunami_cchip.hh" 52#include "dev/alpha/tsunami_io.hh" 53#include "dev/platform.hh" 54#include "dev/storage/simple_disk.hh" 55#include "dev/serial/terminal.hh" 56#include "mem/packet.hh" 57#include "mem/packet_access.hh" 58#include "mem/physical.hh" 59#include "params/AlphaBackdoor.hh" 60#include "sim/sim_object.hh" 61 62using namespace std; 63using namespace AlphaISA; 64 65AlphaBackdoor::AlphaBackdoor(const Params *p) 66 : BasicPioDevice(p, sizeof(struct AlphaAccess)), 67 disk(p->disk), terminal(p->terminal), 68 system(p->system), cpu(p->cpu) 69{ 70 alphaAccess = new Access(); 71 alphaAccess->last_offset = pioSize - 1; 72 73 alphaAccess->version = ALPHA_ACCESS_VERSION; 74 alphaAccess->diskUnit = 1; 75 76 alphaAccess->diskCount = 0; 77 alphaAccess->diskPAddr = 0; 78 alphaAccess->diskBlock = 0; 79 alphaAccess->diskOperation = 0; 80 alphaAccess->outputChar = 0; 81 alphaAccess->inputChar = 0; 82 std::memset(alphaAccess->cpuStack, 0, sizeof(alphaAccess->cpuStack)); 83 84} 85 86void 87AlphaBackdoor::startup() 88{ 89 system->setAlphaAccess(pioAddr); 90 alphaAccess->numCPUs = system->numContexts(); 91 alphaAccess->kernStart = system->getKernelStart(); 92 alphaAccess->kernEnd = system->getKernelEnd(); 93 alphaAccess->entryPoint = system->getKernelEntry(); 94 alphaAccess->mem_size = system->memSize(); 95 alphaAccess->cpuClock = cpu->frequency() / 1000000; // In MHz 96 Tsunami *tsunami = dynamic_cast<Tsunami *>(params()->platform); 97 if (!tsunami) 98 fatal("Platform is not Tsunami.\n"); 99 alphaAccess->intrClockFrequency = tsunami->io->frequency(); 100} 101 102Tick 103AlphaBackdoor::read(PacketPtr pkt) 104{ 105 106 /** XXX Do we want to push the addr munging to a bus brige or something? So 107 * the device has it's physical address and then the bridge adds on whatever 108 * machine dependent address swizzle is required? 109 */ 110 111 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 112 113 Addr daddr = pkt->getAddr() - pioAddr; 114 115 pkt->makeAtomicResponse(); 116 117 switch (pkt->getSize()) 118 { 119 case sizeof(uint32_t): 120 switch (daddr) 121 { 122 case offsetof(AlphaAccess, last_offset): 123 pkt->setLE(alphaAccess->last_offset); 124 break; 125 case offsetof(AlphaAccess, version): 126 pkt->setLE(alphaAccess->version); 127 break; 128 case offsetof(AlphaAccess, numCPUs): 129 pkt->setLE(alphaAccess->numCPUs); 130 break; 131 case offsetof(AlphaAccess, intrClockFrequency): 132 pkt->setLE(alphaAccess->intrClockFrequency); 133 break; 134 default: 135 /* Old console code read in everyting as a 32bit int 136 * we now break that for better error checking. 137 */ 138 pkt->setBadAddress(); 139 } 140 DPRINTF(AlphaBackdoor, "read: offset=%#x val=%#x\n", daddr, 141 pkt->getLE<uint32_t>()); 142 break; 143 case sizeof(uint64_t): 144 switch (daddr) 145 { 146 case offsetof(AlphaAccess, inputChar): 147 pkt->setLE(terminal->console_in()); 148 break; 149 case offsetof(AlphaAccess, cpuClock): 150 pkt->setLE(alphaAccess->cpuClock); 151 break; 152 case offsetof(AlphaAccess, mem_size): 153 pkt->setLE(alphaAccess->mem_size); 154 break; 155 case offsetof(AlphaAccess, kernStart): 156 pkt->setLE(alphaAccess->kernStart); 157 break; 158 case offsetof(AlphaAccess, kernEnd): 159 pkt->setLE(alphaAccess->kernEnd); 160 break; 161 case offsetof(AlphaAccess, entryPoint): 162 pkt->setLE(alphaAccess->entryPoint); 163 break; 164 case offsetof(AlphaAccess, diskUnit): 165 pkt->setLE(alphaAccess->diskUnit); 166 break; 167 case offsetof(AlphaAccess, diskCount): 168 pkt->setLE(alphaAccess->diskCount); 169 break; 170 case offsetof(AlphaAccess, diskPAddr): 171 pkt->setLE(alphaAccess->diskPAddr); 172 break; 173 case offsetof(AlphaAccess, diskBlock): 174 pkt->setLE(alphaAccess->diskBlock); 175 break; 176 case offsetof(AlphaAccess, diskOperation): 177 pkt->setLE(alphaAccess->diskOperation); 178 break; 179 case offsetof(AlphaAccess, outputChar): 180 pkt->setLE(alphaAccess->outputChar); 181 break; 182 default: 183 int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) / 184 sizeof(alphaAccess->cpuStack[0]); 185 186 if (cpunum >= 0 && cpunum < 64) 187 pkt->setLE(alphaAccess->cpuStack[cpunum]); 188 else 189 panic("Unknown 64bit access, %#x\n", daddr); 190 } 191 DPRINTF(AlphaBackdoor, "read: offset=%#x val=%#x\n", daddr, 192 pkt->getLE<uint64_t>()); 193 break; 194 default: 195 pkt->setBadAddress(); 196 } 197 return pioDelay; 198} 199 200Tick 201AlphaBackdoor::write(PacketPtr pkt) 202{ 203 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 204 Addr daddr = pkt->getAddr() - pioAddr; 205 206 uint64_t val = pkt->getLE<uint64_t>(); 207 assert(pkt->getSize() == sizeof(uint64_t)); 208 209 switch (daddr) { 210 case offsetof(AlphaAccess, diskUnit): 211 alphaAccess->diskUnit = val; 212 break; 213 214 case offsetof(AlphaAccess, diskCount): 215 alphaAccess->diskCount = val; 216 break; 217 218 case offsetof(AlphaAccess, diskPAddr): 219 alphaAccess->diskPAddr = val; 220 break; 221 222 case offsetof(AlphaAccess, diskBlock): 223 alphaAccess->diskBlock = val; 224 break; 225 226 case offsetof(AlphaAccess, diskOperation): 227 if (val == 0x13) 228 disk->read(alphaAccess->diskPAddr, alphaAccess->diskBlock, 229 alphaAccess->diskCount); 230 else 231 panic("Invalid disk operation!"); 232 233 break; 234 235 case offsetof(AlphaAccess, outputChar): 236 terminal->writeData((char)(val & 0xff)); 237 break; 238 239 default: 240 int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) / 241 sizeof(alphaAccess->cpuStack[0]); 242 inform("Launching CPU %d @ %d", cpunum, curTick()); 243 assert(val > 0 && "Must not access primary cpu"); 244 if (cpunum >= 0 && cpunum < 64) 245 alphaAccess->cpuStack[cpunum] = val; 246 else 247 panic("Unknown 64bit access, %#x\n", daddr); 248 } 249 250 pkt->makeAtomicResponse(); 251 252 return pioDelay; 253} 254 255void 256AlphaBackdoor::Access::serialize(CheckpointOut &cp) const 257{ 258 SERIALIZE_SCALAR(last_offset); 259 SERIALIZE_SCALAR(version); 260 SERIALIZE_SCALAR(numCPUs); 261 SERIALIZE_SCALAR(mem_size); 262 SERIALIZE_SCALAR(cpuClock); 263 SERIALIZE_SCALAR(intrClockFrequency); 264 SERIALIZE_SCALAR(kernStart); 265 SERIALIZE_SCALAR(kernEnd); 266 SERIALIZE_SCALAR(entryPoint); 267 SERIALIZE_SCALAR(diskUnit); 268 SERIALIZE_SCALAR(diskCount); 269 SERIALIZE_SCALAR(diskPAddr); 270 SERIALIZE_SCALAR(diskBlock); 271 SERIALIZE_SCALAR(diskOperation); 272 SERIALIZE_SCALAR(outputChar); 273 SERIALIZE_SCALAR(inputChar); 274 SERIALIZE_ARRAY(cpuStack,64); 275} 276 277void 278AlphaBackdoor::Access::unserialize(CheckpointIn &cp) 279{ 280 UNSERIALIZE_SCALAR(last_offset); 281 UNSERIALIZE_SCALAR(version); 282 UNSERIALIZE_SCALAR(numCPUs); 283 UNSERIALIZE_SCALAR(mem_size); 284 UNSERIALIZE_SCALAR(cpuClock); 285 UNSERIALIZE_SCALAR(intrClockFrequency); 286 UNSERIALIZE_SCALAR(kernStart); 287 UNSERIALIZE_SCALAR(kernEnd); 288 UNSERIALIZE_SCALAR(entryPoint); 289 UNSERIALIZE_SCALAR(diskUnit); 290 UNSERIALIZE_SCALAR(diskCount); 291 UNSERIALIZE_SCALAR(diskPAddr); 292 UNSERIALIZE_SCALAR(diskBlock); 293 UNSERIALIZE_SCALAR(diskOperation); 294 UNSERIALIZE_SCALAR(outputChar); 295 UNSERIALIZE_SCALAR(inputChar); 296 UNSERIALIZE_ARRAY(cpuStack, 64); 297} 298 299void 300AlphaBackdoor::serialize(CheckpointOut &cp) const 301{ 302 alphaAccess->serialize(cp); 303} 304 305void 306AlphaBackdoor::unserialize(CheckpointIn &cp) 307{ 308 alphaAccess->unserialize(cp); 309} 310 311AlphaBackdoor * 312AlphaBackdoorParams::create() 313{ 314 return new AlphaBackdoor(this); 315} 316